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authorHuang Rui <ray.huang@amd.com>2017-05-31 10:32:35 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-06-06 16:58:29 -0400
commit1e4eccdaf293695f4781ce8b08d3b542d87173c5 (patch)
tree22d43c4b975fc591ff6fba01f15f31a1daa64412 /drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
parent3dff4cc4b0f99f039d41ff86c3503372f9719124 (diff)
drm/amdgpu: fix to miss program invalidation at resume
This patch moves invalidation into gart enable function from hw_init. Because we would like align the sequence calling between init and resume. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c27
1 files changed, 15 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index a5b01771ddb9..3d0c652daab8 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -244,6 +244,20 @@ static void mmhub_v1_0_setup_vmid_config(struct amdgpu_device *adev)
244 } 244 }
245} 245}
246 246
247static void mmhub_v1_0_program_invalidation(struct amdgpu_device *adev)
248{
249 unsigned i;
250
251 for (i = 0; i < 18; ++i) {
252 WREG32(SOC15_REG_OFFSET(MMHUB, 0,
253 mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32) +
254 2 * i, 0xffffffff);
255 WREG32(SOC15_REG_OFFSET(MMHUB, 0,
256 mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32) +
257 2 * i, 0x1f);
258 }
259}
260
247int mmhub_v1_0_gart_enable(struct amdgpu_device *adev) 261int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)
248{ 262{
249 if (amdgpu_sriov_vf(adev)) { 263 if (amdgpu_sriov_vf(adev)) {
@@ -267,6 +281,7 @@ int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)
267 mmhub_v1_0_enable_system_domain(adev); 281 mmhub_v1_0_enable_system_domain(adev);
268 mmhub_v1_0_disable_identity_aperture(adev); 282 mmhub_v1_0_disable_identity_aperture(adev);
269 mmhub_v1_0_setup_vmid_config(adev); 283 mmhub_v1_0_setup_vmid_config(adev);
284 mmhub_v1_0_program_invalidation(adev);
270 285
271 return 0; 286 return 0;
272} 287}
@@ -375,18 +390,6 @@ static int mmhub_v1_0_sw_fini(void *handle)
375 390
376static int mmhub_v1_0_hw_init(void *handle) 391static int mmhub_v1_0_hw_init(void *handle)
377{ 392{
378 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
379 unsigned i;
380
381 for (i = 0; i < 18; ++i) {
382 WREG32(SOC15_REG_OFFSET(MMHUB, 0,
383 mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32) +
384 2 * i, 0xffffffff);
385 WREG32(SOC15_REG_OFFSET(MMHUB, 0,
386 mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32) +
387 2 * i, 0x1f);
388 }
389
390 return 0; 393 return 0;
391} 394}
392 395