drm/amdgpu: wire up emit_wreg for gfx v8

Needed for vm_flush unification.

v2: handle compute rings as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 17 insertions, 1 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 3fd7eb2a9a7b..81afd5463318 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6618,8 +6618,22 @@ static void gfx_v8_0_ring_emit_rreg(struct amdgpu_ring *ring, uint32_t reg)
 static void gfx_v8_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
                                   uint32_t val)
 {
+        uint32_t cmd;
+
+        switch (ring->funcs->type) {
+        case AMDGPU_RING_TYPE_GFX:
+                cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM;
+                break;
+        case AMDGPU_RING_TYPE_KIQ:
+                cmd = 1 << 16; /* no inc addr */
+                break;
+        default:
+                cmd = WR_CONFIRM;
+                break;
+        }
+
         amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
-        amdgpu_ring_write(ring, (1 << 16)); /* no inc addr */
+        amdgpu_ring_write(ring, cmd);
         amdgpu_ring_write(ring, reg);
         amdgpu_ring_write(ring, 0);
         amdgpu_ring_write(ring, val);
@@ -6903,6 +6917,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
         .emit_cntxcntl = gfx_v8_ring_emit_cntxcntl,
         .init_cond_exec = gfx_v8_0_ring_emit_init_cond_exec,
         .patch_cond_exec = gfx_v8_0_ring_emit_patch_cond_exec,
+        .emit_wreg = gfx_v8_0_ring_emit_wreg,
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
@@ -6933,6 +6948,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
         .insert_nop = amdgpu_ring_insert_nop,
         .pad_ib = amdgpu_ring_generic_pad_ib,
         .set_priority = gfx_v8_0_ring_set_priority_compute,
+        .emit_wreg = gfx_v8_0_ring_emit_wreg,
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = {