diff options
author | Christian König <christian.koenig@amd.com> | 2018-01-23 04:03:46 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 14:18:30 -0500 |
commit | 97745f68520df38d9ffb8bd6cb0fa70c047a2c2c (patch) | |
tree | 939d2886e55194be3969a2ad71f9a8253fb59a39 /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |
parent | a3e9a15a25d5dfaacdf4d6a367eba27df83d108a (diff) |
drm/amdgpu: consistently use AMDGPU_CSA_VADDR
Instead of repeating this multiple times.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 5a2e4d5a5bd1..960c35cc2e9c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |||
@@ -7132,12 +7132,12 @@ static void gfx_v8_0_ring_emit_ce_meta(struct amdgpu_ring *ring) | |||
7132 | } ce_payload = {}; | 7132 | } ce_payload = {}; |
7133 | 7133 | ||
7134 | if (ring->adev->virt.chained_ib_support) { | 7134 | if (ring->adev->virt.chained_ib_support) { |
7135 | ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 + | 7135 | ce_payload_addr = AMDGPU_CSA_VADDR + |
7136 | offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload); | 7136 | offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload); |
7137 | cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2; | 7137 | cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2; |
7138 | } else { | 7138 | } else { |
7139 | ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 + | 7139 | ce_payload_addr = AMDGPU_CSA_VADDR + |
7140 | offsetof(struct vi_gfx_meta_data, ce_payload); | 7140 | offsetof(struct vi_gfx_meta_data, ce_payload); |
7141 | cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2; | 7141 | cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2; |
7142 | } | 7142 | } |
7143 | 7143 | ||
@@ -7160,7 +7160,7 @@ static void gfx_v8_0_ring_emit_de_meta(struct amdgpu_ring *ring) | |||
7160 | struct vi_de_ib_state_chained_ib chained; | 7160 | struct vi_de_ib_state_chained_ib chained; |
7161 | } de_payload = {}; | 7161 | } de_payload = {}; |
7162 | 7162 | ||
7163 | csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096; | 7163 | csa_addr = AMDGPU_CSA_VADDR; |
7164 | gds_addr = csa_addr + 4096; | 7164 | gds_addr = csa_addr + 4096; |
7165 | if (ring->adev->virt.chained_ib_support) { | 7165 | if (ring->adev->virt.chained_ib_support) { |
7166 | de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr); | 7166 | de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr); |