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authorAlex Deucher <alexander.deucher@amd.com>2016-10-10 11:17:58 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-10-25 14:38:32 -0400
commit34817db6c73d110d460daf02b977f583caa05a97 (patch)
tree839e89f71eaf0f5bb53d568ca81adfa299bb88b8 /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
parent392f0c775c80de0eae4c07227cc220015df70abc (diff)
drm/amdgpu/gfx8: use cached raster config values in csb setup
Simplify the code and properly set the csb for harvest values. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c30
1 files changed, 2 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index e0664415b18e..8dc8f576d2c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1140,34 +1140,8 @@ static void gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev,
1140 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); 1140 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
1141 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - 1141 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG -
1142 PACKET3_SET_CONTEXT_REG_START); 1142 PACKET3_SET_CONTEXT_REG_START);
1143 switch (adev->asic_type) { 1143 buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config);
1144 case CHIP_TONGA: 1144 buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config_1);
1145 case CHIP_POLARIS10:
1146 buffer[count++] = cpu_to_le32(0x16000012);
1147 buffer[count++] = cpu_to_le32(0x0000002A);
1148 break;
1149 case CHIP_POLARIS11:
1150 buffer[count++] = cpu_to_le32(0x16000012);
1151 buffer[count++] = cpu_to_le32(0x00000000);
1152 break;
1153 case CHIP_FIJI:
1154 buffer[count++] = cpu_to_le32(0x3a00161a);
1155 buffer[count++] = cpu_to_le32(0x0000002e);
1156 break;
1157 case CHIP_TOPAZ:
1158 case CHIP_CARRIZO:
1159 buffer[count++] = cpu_to_le32(0x00000002);
1160 buffer[count++] = cpu_to_le32(0x00000000);
1161 break;
1162 case CHIP_STONEY:
1163 buffer[count++] = cpu_to_le32(0x00000000);
1164 buffer[count++] = cpu_to_le32(0x00000000);
1165 break;
1166 default:
1167 buffer[count++] = cpu_to_le32(0x00000000);
1168 buffer[count++] = cpu_to_le32(0x00000000);
1169 break;
1170 }
1171 1145
1172 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); 1146 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
1173 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); 1147 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);