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authorAlex Deucher <alexander.deucher@amd.com>2016-09-30 11:41:37 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-10-25 14:38:05 -0400
commit9405e47dbab33706c43caba72cf8d83b5746f843 (patch)
tree627dc362b12f3ddf4917e2d2e8ae77ac8b79518b /drivers/gpu/drm/amd/amdgpu/dce_virtual.c
parentbf2335a54e191ab68d10d61490f8cbbd47585790 (diff)
drm/amdgpu/virtual_dce: clean up interrupt handling
We handle the virtual interrupts from a timer so no need to try an look like we are handling IV ring events. Reviewed-By: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_virtual.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_virtual.c109
1 files changed, 54 insertions, 55 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 0771d6df7186..bc8f5e332915 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -39,9 +39,6 @@
39 39
40static void dce_virtual_set_display_funcs(struct amdgpu_device *adev); 40static void dce_virtual_set_display_funcs(struct amdgpu_device *adev);
41static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev); 41static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev);
42static int dce_virtual_pageflip_irq(struct amdgpu_device *adev,
43 struct amdgpu_irq_src *source,
44 struct amdgpu_iv_entry *entry);
45 42
46/** 43/**
47 * dce_virtual_vblank_wait - vblank wait asic callback. 44 * dce_virtual_vblank_wait - vblank wait asic callback.
@@ -655,14 +652,64 @@ static void dce_virtual_set_display_funcs(struct amdgpu_device *adev)
655 adev->mode_info.funcs = &dce_virtual_display_funcs; 652 adev->mode_info.funcs = &dce_virtual_display_funcs;
656} 653}
657 654
655static int dce_virtual_pageflip(struct amdgpu_device *adev,
656 unsigned crtc_id)
657{
658 unsigned long flags;
659 struct amdgpu_crtc *amdgpu_crtc;
660 struct amdgpu_flip_work *works;
661
662 amdgpu_crtc = adev->mode_info.crtcs[crtc_id];
663
664 if (crtc_id >= adev->mode_info.num_crtc) {
665 DRM_ERROR("invalid pageflip crtc %d\n", crtc_id);
666 return -EINVAL;
667 }
668
669 /* IRQ could occur when in initial stage */
670 if (amdgpu_crtc == NULL)
671 return 0;
672
673 spin_lock_irqsave(&adev->ddev->event_lock, flags);
674 works = amdgpu_crtc->pflip_works;
675 if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED) {
676 DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d != "
677 "AMDGPU_FLIP_SUBMITTED(%d)\n",
678 amdgpu_crtc->pflip_status,
679 AMDGPU_FLIP_SUBMITTED);
680 spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
681 return 0;
682 }
683
684 /* page flip completed. clean up */
685 amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
686 amdgpu_crtc->pflip_works = NULL;
687
688 /* wakeup usersapce */
689 if (works->event)
690 drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
691
692 spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
693
694 drm_crtc_vblank_put(&amdgpu_crtc->base);
695 schedule_work(&works->unpin_work);
696
697 return 0;
698}
699
658static enum hrtimer_restart dce_virtual_vblank_timer_handle(struct hrtimer *vblank_timer) 700static enum hrtimer_restart dce_virtual_vblank_timer_handle(struct hrtimer *vblank_timer)
659{ 701{
660 struct amdgpu_mode_info *mode_info = container_of(vblank_timer, struct amdgpu_mode_info ,vblank_timer); 702 struct amdgpu_mode_info *mode_info =
661 struct amdgpu_device *adev = container_of(mode_info, struct amdgpu_device ,mode_info); 703 container_of(vblank_timer, struct amdgpu_mode_info , vblank_timer);
704 struct amdgpu_device *adev =
705 container_of(mode_info, struct amdgpu_device , mode_info);
662 unsigned crtc = 0; 706 unsigned crtc = 0;
707
663 drm_handle_vblank(adev->ddev, crtc); 708 drm_handle_vblank(adev->ddev, crtc);
664 dce_virtual_pageflip_irq(adev, NULL, NULL); 709 dce_virtual_pageflip(adev, crtc);
665 hrtimer_start(vblank_timer, ktime_set(0, DCE_VIRTUAL_VBLANK_PERIOD), HRTIMER_MODE_REL); 710 hrtimer_start(vblank_timer, ktime_set(0, DCE_VIRTUAL_VBLANK_PERIOD),
711 HRTIMER_MODE_REL);
712
666 return HRTIMER_NORESTART; 713 return HRTIMER_NORESTART;
667} 714}
668 715
@@ -706,54 +753,6 @@ static int dce_virtual_set_crtc_irq_state(struct amdgpu_device *adev,
706 return 0; 753 return 0;
707} 754}
708 755
709static int dce_virtual_pageflip_irq(struct amdgpu_device *adev,
710 struct amdgpu_irq_src *source,
711 struct amdgpu_iv_entry *entry)
712{
713 unsigned long flags;
714 unsigned crtc_id = 0;
715 struct amdgpu_crtc *amdgpu_crtc;
716 struct amdgpu_flip_work *works;
717
718 crtc_id = 0;
719 amdgpu_crtc = adev->mode_info.crtcs[crtc_id];
720
721 if (crtc_id >= adev->mode_info.num_crtc) {
722 DRM_ERROR("invalid pageflip crtc %d\n", crtc_id);
723 return -EINVAL;
724 }
725
726 /* IRQ could occur when in initial stage */
727 if (amdgpu_crtc == NULL)
728 return 0;
729
730 spin_lock_irqsave(&adev->ddev->event_lock, flags);
731 works = amdgpu_crtc->pflip_works;
732 if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED) {
733 DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d != "
734 "AMDGPU_FLIP_SUBMITTED(%d)\n",
735 amdgpu_crtc->pflip_status,
736 AMDGPU_FLIP_SUBMITTED);
737 spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
738 return 0;
739 }
740
741 /* page flip completed. clean up */
742 amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
743 amdgpu_crtc->pflip_works = NULL;
744
745 /* wakeup usersapce */
746 if (works->event)
747 drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
748
749 spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
750
751 drm_crtc_vblank_put(&amdgpu_crtc->base);
752 schedule_work(&works->unpin_work);
753
754 return 0;
755}
756
757static const struct amdgpu_irq_src_funcs dce_virtual_crtc_irq_funcs = { 756static const struct amdgpu_irq_src_funcs dce_virtual_crtc_irq_funcs = {
758 .set = dce_virtual_set_crtc_irq_state, 757 .set = dce_virtual_set_crtc_irq_state,
759 .process = NULL, 758 .process = NULL,