diff options
author | Peter Rosin <peda@axentia.se> | 2017-07-13 12:25:28 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-08-04 05:35:15 -0400 |
commit | 76dd3cd8405cd08e27f99343ceddd5d32bfa0026 (patch) | |
tree | 033ca0f202c2c1482d9a681098b856bad1ec1cf5 /drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | |
parent | 8415ab565da966b2bf85ed9322784cd15770a66e (diff) |
drm: amd: remove dead code and pointless local lut storage
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Peter Rosin <peda@axentia.se>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20170713162538.22788-5-peda@axentia.se
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_v6_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 27 |
1 files changed, 7 insertions, 20 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c index 0c3891fa62f1..f3c422e93ed1 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | |||
@@ -2182,6 +2182,7 @@ static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc) | |||
2182 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); | 2182 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
2183 | struct drm_device *dev = crtc->dev; | 2183 | struct drm_device *dev = crtc->dev; |
2184 | struct amdgpu_device *adev = dev->dev_private; | 2184 | struct amdgpu_device *adev = dev->dev_private; |
2185 | u16 *r, *g, *b; | ||
2185 | int i; | 2186 | int i; |
2186 | 2187 | ||
2187 | DRM_DEBUG_KMS("%d\n", amdgpu_crtc->crtc_id); | 2188 | DRM_DEBUG_KMS("%d\n", amdgpu_crtc->crtc_id); |
@@ -2211,11 +2212,14 @@ static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc) | |||
2211 | WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007); | 2212 | WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007); |
2212 | 2213 | ||
2213 | WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0); | 2214 | WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0); |
2215 | r = crtc->gamma_store; | ||
2216 | g = r + crtc->gamma_size; | ||
2217 | b = g + crtc->gamma_size; | ||
2214 | for (i = 0; i < 256; i++) { | 2218 | for (i = 0; i < 256; i++) { |
2215 | WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset, | 2219 | WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset, |
2216 | (amdgpu_crtc->lut_r[i] << 20) | | 2220 | ((*r++ & 0xffc0) << 14) | |
2217 | (amdgpu_crtc->lut_g[i] << 10) | | 2221 | ((*g++ & 0xffc0) << 4) | |
2218 | (amdgpu_crtc->lut_b[i] << 0)); | 2222 | (*b++ >> 6)); |
2219 | } | 2223 | } |
2220 | 2224 | ||
2221 | WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, | 2225 | WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, |
@@ -2496,15 +2500,6 @@ static int dce_v6_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
2496 | u16 *blue, uint32_t size, | 2500 | u16 *blue, uint32_t size, |
2497 | struct drm_modeset_acquire_ctx *ctx) | 2501 | struct drm_modeset_acquire_ctx *ctx) |
2498 | { | 2502 | { |
2499 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); | ||
2500 | int i; | ||
2501 | |||
2502 | /* userspace palettes are always correct as is */ | ||
2503 | for (i = 0; i < size; i++) { | ||
2504 | amdgpu_crtc->lut_r[i] = red[i] >> 6; | ||
2505 | amdgpu_crtc->lut_g[i] = green[i] >> 6; | ||
2506 | amdgpu_crtc->lut_b[i] = blue[i] >> 6; | ||
2507 | } | ||
2508 | dce_v6_0_crtc_load_lut(crtc); | 2503 | dce_v6_0_crtc_load_lut(crtc); |
2509 | 2504 | ||
2510 | return 0; | 2505 | return 0; |
@@ -2712,14 +2707,12 @@ static const struct drm_crtc_helper_funcs dce_v6_0_crtc_helper_funcs = { | |||
2712 | .mode_set_base_atomic = dce_v6_0_crtc_set_base_atomic, | 2707 | .mode_set_base_atomic = dce_v6_0_crtc_set_base_atomic, |
2713 | .prepare = dce_v6_0_crtc_prepare, | 2708 | .prepare = dce_v6_0_crtc_prepare, |
2714 | .commit = dce_v6_0_crtc_commit, | 2709 | .commit = dce_v6_0_crtc_commit, |
2715 | .load_lut = dce_v6_0_crtc_load_lut, | ||
2716 | .disable = dce_v6_0_crtc_disable, | 2710 | .disable = dce_v6_0_crtc_disable, |
2717 | }; | 2711 | }; |
2718 | 2712 | ||
2719 | static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index) | 2713 | static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index) |
2720 | { | 2714 | { |
2721 | struct amdgpu_crtc *amdgpu_crtc; | 2715 | struct amdgpu_crtc *amdgpu_crtc; |
2722 | int i; | ||
2723 | 2716 | ||
2724 | amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) + | 2717 | amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) + |
2725 | (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL); | 2718 | (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL); |
@@ -2737,12 +2730,6 @@ static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index) | |||
2737 | adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; | 2730 | adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; |
2738 | adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; | 2731 | adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; |
2739 | 2732 | ||
2740 | for (i = 0; i < 256; i++) { | ||
2741 | amdgpu_crtc->lut_r[i] = i << 2; | ||
2742 | amdgpu_crtc->lut_g[i] = i << 2; | ||
2743 | amdgpu_crtc->lut_b[i] = i << 2; | ||
2744 | } | ||
2745 | |||
2746 | amdgpu_crtc->crtc_offset = crtc_offsets[amdgpu_crtc->crtc_id]; | 2733 | amdgpu_crtc->crtc_offset = crtc_offsets[amdgpu_crtc->crtc_id]; |
2747 | 2734 | ||
2748 | amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; | 2735 | amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; |