diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2018-06-25 13:24:10 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-05 17:39:52 -0400 |
commit | 1cf0abb6c983d90ec541ebba79934a9c4786df1d (patch) | |
tree | 8f4c1b4dcbe6ca895832abde19129536dac9a2ac /drivers/gpu/drm/amd/amdgpu/cik_sdma.c | |
parent | ed54d954e5c1d8bad453fb86109075b3577152b7 (diff) |
drm/amdgpu/sdma: simplify sdma instance setup
Set the me instance in early init and use that rather than
calculating the instance based on the ring pointer.
Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cik_sdma.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c index a7576255cc30..dbd553a8d584 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c | |||
@@ -177,9 +177,8 @@ static uint64_t cik_sdma_ring_get_rptr(struct amdgpu_ring *ring) | |||
177 | static uint64_t cik_sdma_ring_get_wptr(struct amdgpu_ring *ring) | 177 | static uint64_t cik_sdma_ring_get_wptr(struct amdgpu_ring *ring) |
178 | { | 178 | { |
179 | struct amdgpu_device *adev = ring->adev; | 179 | struct amdgpu_device *adev = ring->adev; |
180 | u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; | ||
181 | 180 | ||
182 | return (RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me]) & 0x3fffc) >> 2; | 181 | return (RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[ring->me]) & 0x3fffc) >> 2; |
183 | } | 182 | } |
184 | 183 | ||
185 | /** | 184 | /** |
@@ -192,9 +191,8 @@ static uint64_t cik_sdma_ring_get_wptr(struct amdgpu_ring *ring) | |||
192 | static void cik_sdma_ring_set_wptr(struct amdgpu_ring *ring) | 191 | static void cik_sdma_ring_set_wptr(struct amdgpu_ring *ring) |
193 | { | 192 | { |
194 | struct amdgpu_device *adev = ring->adev; | 193 | struct amdgpu_device *adev = ring->adev; |
195 | u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; | ||
196 | 194 | ||
197 | WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me], | 195 | WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[ring->me], |
198 | (lower_32_bits(ring->wptr) << 2) & 0x3fffc); | 196 | (lower_32_bits(ring->wptr) << 2) & 0x3fffc); |
199 | } | 197 | } |
200 | 198 | ||
@@ -248,7 +246,7 @@ static void cik_sdma_ring_emit_hdp_flush(struct amdgpu_ring *ring) | |||
248 | SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ | 246 | SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ |
249 | u32 ref_and_mask; | 247 | u32 ref_and_mask; |
250 | 248 | ||
251 | if (ring == &ring->adev->sdma.instance[0].ring) | 249 | if (ring->me == 0) |
252 | ref_and_mask = GPU_HDP_FLUSH_DONE__SDMA0_MASK; | 250 | ref_and_mask = GPU_HDP_FLUSH_DONE__SDMA0_MASK; |
253 | else | 251 | else |
254 | ref_and_mask = GPU_HDP_FLUSH_DONE__SDMA1_MASK; | 252 | ref_and_mask = GPU_HDP_FLUSH_DONE__SDMA1_MASK; |
@@ -1290,8 +1288,10 @@ static void cik_sdma_set_ring_funcs(struct amdgpu_device *adev) | |||
1290 | { | 1288 | { |
1291 | int i; | 1289 | int i; |
1292 | 1290 | ||
1293 | for (i = 0; i < adev->sdma.num_instances; i++) | 1291 | for (i = 0; i < adev->sdma.num_instances; i++) { |
1294 | adev->sdma.instance[i].ring.funcs = &cik_sdma_ring_funcs; | 1292 | adev->sdma.instance[i].ring.funcs = &cik_sdma_ring_funcs; |
1293 | adev->sdma.instance[i].ring.me = i; | ||
1294 | } | ||
1295 | } | 1295 | } |
1296 | 1296 | ||
1297 | static const struct amdgpu_irq_src_funcs cik_sdma_trap_irq_funcs = { | 1297 | static const struct amdgpu_irq_src_funcs cik_sdma_trap_irq_funcs = { |