Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more things for 4.12:
- ttm and amdgpu support for non-contiguous vram CPU mappings
- lots of bug fixes and cleanups for vega10
- misc bug fixes and code cleanups

[airlied: fix do_div error on 32-bit arm, not sure it's 100% correct]

* 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits)
  drm/amdgpu: use uintptr_t instead of unsigned long to store pointer
  drm/amdgpu: Avoid using signed integer to store pointer value
  drm/amdgpu:invoke new implemented AI MB func
  drm/amdgpu/vega10:timeout set to equal with VI
  drm/amdgpu:implement the reset MB func for vega10
  drm/amdgpu:fix typo for mxgpu_ai
  drm/amdgpu:no need to involv HDP in KIQ
  drm/amdgpu:add PSP block only load_type=PSP (v2)
  drm/amdgpu/smu9: update to latest driver interface
  drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
  drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
  drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
  drm/amd/amdgpu: Drop gfx_v9_0_print_status()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
  drm/amdgpu: Move function amdgpu_has_atpx near other similar functions
  ...

1 files changed, 13 insertions, 4 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 9e577e3d3147..a4831fe0223b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -93,7 +93,6 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
                                const struct ttm_place *place,
                                struct ttm_mem_reg *mem)
 {
-        struct amdgpu_bo *bo = container_of(tbo, struct amdgpu_bo, tbo);
         struct amdgpu_vram_mgr *mgr = man->priv;
         struct drm_mm *mm = &mgr->mm;
         struct drm_mm_node *nodes;
@@ -106,8 +105,8 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
         if (!lpfn)
                 lpfn = man->size;
 
-        if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS ||
-            place->lpfn || amdgpu_vram_page_split == -1) {
+        if (place->flags & TTM_PL_FLAG_CONTIGUOUS ||
+            amdgpu_vram_page_split == -1) {
                 pages_per_node = ~0ul;
                 num_nodes = 1;
         } else {
@@ -124,12 +123,14 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
         if (place->flags & TTM_PL_FLAG_TOPDOWN)
                 mode = DRM_MM_INSERT_HIGH;
 
+        mem->start = 0;
         pages_left = mem->num_pages;
 
         spin_lock(&mgr->lock);
         for (i = 0; i < num_nodes; ++i) {
                 unsigned long pages = min(pages_left, pages_per_node);
                 uint32_t alignment = mem->page_alignment;
+                unsigned long start;
 
                 if (pages == pages_per_node)
                         alignment = pages_per_node;
@@ -141,11 +142,19 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
                 if (unlikely(r))
                         goto error;
 
+                /* Calculate a virtual BO start address to easily check if
+                 * everything is CPU accessible.
+                 */
+                start = nodes[i].start + nodes[i].size;
+                if (start > mem->num_pages)
+                        start -= mem->num_pages;
+                else
+                        start = 0;
+                mem->start = max(mem->start, start);
                 pages_left -= pages;
         }
         spin_unlock(&mgr->lock);
 
-        mem->start = num_nodes == 1 ? nodes[0].start : AMDGPU_BO_INVALID_OFFSET;
         mem->mm_node = nodes;
 
         return 0;