diff options
author | Chunming Zhou <David1.Zhou@amd.com> | 2016-07-01 05:59:01 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 15:06:16 -0400 |
commit | fd53be302f0efabead8e37553eaeed1572d0f727 (patch) | |
tree | d5f9d42c13951d785eb8c2df449e66036048de3a /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |
parent | ec75f573c358bf4b36148659534b3674b80f7a09 (diff) |
drm/amdgpu: add a bool to specify if needing vm flush V2
which avoids job->vm_pd_addr be changed.
V2: pass job structure to amdgpu_vm_grab_id and amdgpu_vm_flush directly.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 67 |
1 files changed, 31 insertions, 36 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index d9553d38b44e..f39679a556f3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |||
@@ -185,7 +185,7 @@ void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev, | |||
185 | */ | 185 | */ |
186 | int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, | 186 | int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, |
187 | struct amdgpu_sync *sync, struct fence *fence, | 187 | struct amdgpu_sync *sync, struct fence *fence, |
188 | unsigned *vm_id, uint64_t *vm_pd_addr) | 188 | struct amdgpu_job *job) |
189 | { | 189 | { |
190 | struct amdgpu_device *adev = ring->adev; | 190 | struct amdgpu_device *adev = ring->adev; |
191 | struct fence *updates = sync->last_vm_update; | 191 | struct fence *updates = sync->last_vm_update; |
@@ -242,6 +242,7 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, | |||
242 | } | 242 | } |
243 | kfree(fences); | 243 | kfree(fences); |
244 | 244 | ||
245 | job->vm_needs_flush = true; | ||
245 | /* Check if we can use a VMID already assigned to this VM */ | 246 | /* Check if we can use a VMID already assigned to this VM */ |
246 | i = ring->idx; | 247 | i = ring->idx; |
247 | do { | 248 | do { |
@@ -261,7 +262,7 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, | |||
261 | if (atomic64_read(&id->owner) != vm->client_id) | 262 | if (atomic64_read(&id->owner) != vm->client_id) |
262 | continue; | 263 | continue; |
263 | 264 | ||
264 | if (*vm_pd_addr != id->pd_gpu_addr) | 265 | if (job->vm_pd_addr != id->pd_gpu_addr) |
265 | continue; | 266 | continue; |
266 | 267 | ||
267 | if (!same_ring && | 268 | if (!same_ring && |
@@ -284,9 +285,9 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, | |||
284 | list_move_tail(&id->list, &adev->vm_manager.ids_lru); | 285 | list_move_tail(&id->list, &adev->vm_manager.ids_lru); |
285 | vm->ids[ring->idx] = id; | 286 | vm->ids[ring->idx] = id; |
286 | 287 | ||
287 | *vm_id = id - adev->vm_manager.ids; | 288 | job->vm_id = id - adev->vm_manager.ids; |
288 | *vm_pd_addr = AMDGPU_VM_NO_FLUSH; | 289 | job->vm_needs_flush = false; |
289 | trace_amdgpu_vm_grab_id(vm, ring->idx, *vm_id, *vm_pd_addr); | 290 | trace_amdgpu_vm_grab_id(vm, ring->idx, job->vm_id, job->vm_pd_addr); |
290 | 291 | ||
291 | mutex_unlock(&adev->vm_manager.lock); | 292 | mutex_unlock(&adev->vm_manager.lock); |
292 | return 0; | 293 | return 0; |
@@ -310,15 +311,14 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, | |||
310 | fence_put(id->flushed_updates); | 311 | fence_put(id->flushed_updates); |
311 | id->flushed_updates = fence_get(updates); | 312 | id->flushed_updates = fence_get(updates); |
312 | 313 | ||
313 | id->pd_gpu_addr = *vm_pd_addr; | 314 | id->pd_gpu_addr = job->vm_pd_addr; |
314 | |||
315 | id->current_gpu_reset_count = atomic_read(&adev->gpu_reset_counter); | 315 | id->current_gpu_reset_count = atomic_read(&adev->gpu_reset_counter); |
316 | list_move_tail(&id->list, &adev->vm_manager.ids_lru); | 316 | list_move_tail(&id->list, &adev->vm_manager.ids_lru); |
317 | atomic64_set(&id->owner, vm->client_id); | 317 | atomic64_set(&id->owner, vm->client_id); |
318 | vm->ids[ring->idx] = id; | 318 | vm->ids[ring->idx] = id; |
319 | 319 | ||
320 | *vm_id = id - adev->vm_manager.ids; | 320 | job->vm_id = id - adev->vm_manager.ids; |
321 | trace_amdgpu_vm_grab_id(vm, ring->idx, *vm_id, *vm_pd_addr); | 321 | trace_amdgpu_vm_grab_id(vm, ring->idx, job->vm_id, job->vm_pd_addr); |
322 | 322 | ||
323 | error: | 323 | error: |
324 | mutex_unlock(&adev->vm_manager.lock); | 324 | mutex_unlock(&adev->vm_manager.lock); |
@@ -360,34 +360,29 @@ static bool amdgpu_vm_ring_has_compute_vm_bug(struct amdgpu_ring *ring) | |||
360 | * | 360 | * |
361 | * Emit a VM flush when it is necessary. | 361 | * Emit a VM flush when it is necessary. |
362 | */ | 362 | */ |
363 | int amdgpu_vm_flush(struct amdgpu_ring *ring, | 363 | int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job) |
364 | unsigned vm_id, uint64_t pd_addr, | ||
365 | uint32_t gds_base, uint32_t gds_size, | ||
366 | uint32_t gws_base, uint32_t gws_size, | ||
367 | uint32_t oa_base, uint32_t oa_size) | ||
368 | { | 364 | { |
369 | struct amdgpu_device *adev = ring->adev; | 365 | struct amdgpu_device *adev = ring->adev; |
370 | struct amdgpu_vm_id *id = &adev->vm_manager.ids[vm_id]; | 366 | struct amdgpu_vm_id *id = &adev->vm_manager.ids[job->vm_id]; |
371 | bool gds_switch_needed = ring->funcs->emit_gds_switch && ( | 367 | bool gds_switch_needed = ring->funcs->emit_gds_switch && ( |
372 | id->gds_base != gds_base || | 368 | id->gds_base != job->gds_base || |
373 | id->gds_size != gds_size || | 369 | id->gds_size != job->gds_size || |
374 | id->gws_base != gws_base || | 370 | id->gws_base != job->gws_base || |
375 | id->gws_size != gws_size || | 371 | id->gws_size != job->gws_size || |
376 | id->oa_base != oa_base || | 372 | id->oa_base != job->oa_base || |
377 | id->oa_size != oa_size); | 373 | id->oa_size != job->oa_size); |
378 | int r; | 374 | int r; |
379 | 375 | ||
380 | if (ring->funcs->emit_pipeline_sync && ( | 376 | if (ring->funcs->emit_pipeline_sync && ( |
381 | pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed || | 377 | job->vm_needs_flush || gds_switch_needed || |
382 | amdgpu_vm_ring_has_compute_vm_bug(ring))) | 378 | amdgpu_vm_ring_has_compute_vm_bug(ring))) |
383 | amdgpu_ring_emit_pipeline_sync(ring); | 379 | amdgpu_ring_emit_pipeline_sync(ring); |
384 | 380 | ||
385 | if (ring->funcs->emit_vm_flush && | 381 | if (ring->funcs->emit_vm_flush && job->vm_needs_flush) { |
386 | pd_addr != AMDGPU_VM_NO_FLUSH) { | ||
387 | struct fence *fence; | 382 | struct fence *fence; |
388 | 383 | ||
389 | trace_amdgpu_vm_flush(pd_addr, ring->idx, vm_id); | 384 | trace_amdgpu_vm_flush(job->vm_pd_addr, ring->idx, job->vm_id); |
390 | amdgpu_ring_emit_vm_flush(ring, vm_id, pd_addr); | 385 | amdgpu_ring_emit_vm_flush(ring, job->vm_id, job->vm_pd_addr); |
391 | 386 | ||
392 | r = amdgpu_fence_emit(ring, &fence); | 387 | r = amdgpu_fence_emit(ring, &fence); |
393 | if (r) | 388 | if (r) |
@@ -400,16 +395,16 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, | |||
400 | } | 395 | } |
401 | 396 | ||
402 | if (gds_switch_needed) { | 397 | if (gds_switch_needed) { |
403 | id->gds_base = gds_base; | 398 | id->gds_base = job->gds_base; |
404 | id->gds_size = gds_size; | 399 | id->gds_size = job->gds_size; |
405 | id->gws_base = gws_base; | 400 | id->gws_base = job->gws_base; |
406 | id->gws_size = gws_size; | 401 | id->gws_size = job->gws_size; |
407 | id->oa_base = oa_base; | 402 | id->oa_base = job->oa_base; |
408 | id->oa_size = oa_size; | 403 | id->oa_size = job->oa_size; |
409 | amdgpu_ring_emit_gds_switch(ring, vm_id, | 404 | amdgpu_ring_emit_gds_switch(ring, job->vm_id, |
410 | gds_base, gds_size, | 405 | job->gds_base, job->gds_size, |
411 | gws_base, gws_size, | 406 | job->gws_base, job->gws_size, |
412 | oa_base, oa_size); | 407 | job->oa_base, job->oa_size); |
413 | } | 408 | } |
414 | 409 | ||
415 | return 0; | 410 | return 0; |