Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-next

Updates for 5.1:
- GDS fixes
- Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES interface
- GPUVM fixes
- PCIE DPM switching fixes for vega20
- Vega10 uclk DPM regression fix
- DC Freesync fixes
- DC ABM fixes
- Various DC cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190208210214.27666-1-alexander.deucher@amd.com

1 files changed, 16 insertions, 17 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 0bc6f553dc08..75481cf3348f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -107,14 +107,6 @@ struct amdgpu_pte_update_params {
          * DMA addresses to use for mapping, used during VM update by CPU
          */
         dma_addr_t *pages_addr;
-
-        /**
-         * @kptr:
-         *
-         * Kernel pointer of PD/PT BO that needs to be updated,
-         * used during VM update by CPU
-         */
-        void *kptr;
 };
 
 /**
@@ -1789,13 +1781,20 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
                 if (pages_addr)
                         params.src = ~0;
 
-                /* Wait for PT BOs to be free. PTs share the same resv. object
+                /* Wait for PT BOs to be idle. PTs share the same resv. object
                  * as the root PD BO
                  */
                 r = amdgpu_vm_wait_pd(adev, vm, owner);
                 if (unlikely(r))
                         return r;
 
+                /* Wait for any BO move to be completed */
+                if (exclusive) {
+                        r = dma_fence_wait(exclusive, true);
+                        if (unlikely(r))
+                                return r;
+                }
+
                 params.func = amdgpu_vm_cpu_set_ptes;
                 params.pages_addr = pages_addr;
                 return amdgpu_vm_update_ptes(&params, start, last + 1,
@@ -1809,13 +1808,12 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
         /*
          * reserve space for two commands every (1 << BLOCK_SIZE)
          *  entries or 2k dwords (whatever is smaller)
-         *
-         * The second command is for the shadow pagetables.
          */
+        ncmds = ((nptes >> min(adev->vm_manager.block_size, 11u)) + 1);
+
+        /* The second command is for the shadow pagetables. */
         if (vm->root.base.bo->shadow)
-                ncmds = ((nptes >> min(adev->vm_manager.block_size, 11u)) + 1) * 2;
-        else
-                ncmds = ((nptes >> min(adev->vm_manager.block_size, 11u)) + 1);
+                ncmds *= 2;
 
         /* padding, etc. */
         ndw = 64;
@@ -1834,10 +1832,11 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
                 ndw += ncmds * 10;
 
                 /* extra commands for begin/end fragments */
+                ncmds = 2 * adev->vm_manager.fragment_size;
                 if (vm->root.base.bo->shadow)
-                        ndw += 2 * 10 * adev->vm_manager.fragment_size * 2;
-                else
-                        ndw += 2 * 10 * adev->vm_manager.fragment_size;
+                        ncmds *= 2;
+
+                ndw += 10 * ncmds;
 
                 params.func = amdgpu_vm_do_set_ptes;
         }