drm/amdgpu: cleanup the write_pte implementations

We don't need the gart mapping handling here any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 7 insertions, 13 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 51db44abdfa5..e0e40aca0f78 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -491,8 +491,8 @@ static void amdgpu_vm_update_pages(struct amdgpu_pte_update_params *params,
                         pe, (params->src + (addr >> 12) * 8), count);
 
         } else if (count < 3) {
-                amdgpu_vm_write_pte(params->adev, params->ib, NULL, pe, addr,
-                                    count, incr, flags);
+                amdgpu_vm_write_pte(params->adev, params->ib, pe,
+                                    addr | flags, count, incr);
 
         } else {
                 amdgpu_vm_set_pte_pde(params->adev, params->ib, pe, addr,
@@ -569,21 +569,15 @@ error:
  * Look up the physical address of the page that the pte resolves
  * to and return the pointer for the page table entry.
  */
-uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
+static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
 {
         uint64_t result;
 
-        if (pages_addr) {
-                /* page table offset */
-                result = pages_addr[addr >> PAGE_SHIFT];
-
-                /* in case cpu page size != gpu page size*/
-                result |= addr & (~PAGE_MASK);
+        /* page table offset */
+        result = pages_addr[addr >> PAGE_SHIFT];
 
-        } else {
-                /* No mapping required */
-                result = addr;
-        }
+        /* in case cpu page size != gpu page size*/
+        result |= addr & (~PAGE_MASK);
 
         result &= 0xFFFFFFFFFFFFF000ULL;