drm/amdgpu: adjust HDP write queue flushing for tlb invalidation

Separate tlb invalidation and hdp flushing and move the HDP
flush to the caller.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 5afbc5e714d0..df0f99741b73 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -856,6 +856,7 @@ restart:
         if (vm->use_cpu_for_update) {
                 /* Flush HDP */
                 mb();
+                amdgpu_asic_flush_hdp(adev);
                 amdgpu_gart_flush_gpu_tlb(adev, 0);
         } else if (params.ib->length_dw == 0) {
                 amdgpu_job_free(job);
@@ -1457,6 +1458,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
         if (vm->use_cpu_for_update) {
                 /* Flush HDP */
                 mb();
+                amdgpu_asic_flush_hdp(adev);
                 amdgpu_gart_flush_gpu_tlb(adev, 0);
         }