diff options
author | Christian König <christian.koenig@amd.com> | 2018-08-16 07:23:48 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-03-19 16:36:48 -0400 |
commit | 83cd83972260de1197a80724038c8a14ee7a38f0 (patch) | |
tree | 36d7c9c3d152c68c8dbad23281e7e74b905453b4 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |
parent | db65e887fea55ba3e5ce77f7b129a0cde0e1f050 (diff) |
drm/amdgpu: rework shadow handling during PD clear v3
This way we only deal with the real BO in here.
v2: use a do { ... } while loop instead
v3: fix NULL pointer in v2
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 67 |
1 files changed, 39 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index 12d51d96491e..d9a0ac14c4ca 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |||
@@ -788,44 +788,61 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev, | |||
788 | 788 | ||
789 | r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); | 789 | r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); |
790 | if (r) | 790 | if (r) |
791 | goto error; | 791 | return r; |
792 | 792 | ||
793 | r = amdgpu_ttm_alloc_gart(&bo->tbo); | 793 | r = amdgpu_ttm_alloc_gart(&bo->tbo); |
794 | if (r) | 794 | if (r) |
795 | return r; | 795 | return r; |
796 | 796 | ||
797 | if (bo->shadow) { | ||
798 | r = ttm_bo_validate(&bo->shadow->tbo, &bo->shadow->placement, | ||
799 | &ctx); | ||
800 | if (r) | ||
801 | return r; | ||
802 | |||
803 | r = amdgpu_ttm_alloc_gart(&bo->shadow->tbo); | ||
804 | if (r) | ||
805 | return r; | ||
806 | |||
807 | } | ||
808 | |||
797 | r = amdgpu_job_alloc_with_ib(adev, 64, &job); | 809 | r = amdgpu_job_alloc_with_ib(adev, 64, &job); |
798 | if (r) | 810 | if (r) |
799 | goto error; | 811 | return r; |
812 | |||
813 | do { | ||
814 | addr = amdgpu_bo_gpu_offset(bo); | ||
815 | if (ats_entries) { | ||
816 | uint64_t ats_value; | ||
800 | 817 | ||
801 | addr = amdgpu_bo_gpu_offset(bo); | 818 | ats_value = AMDGPU_PTE_DEFAULT_ATC; |
802 | if (ats_entries) { | 819 | if (level != AMDGPU_VM_PTB) |
803 | uint64_t ats_value; | 820 | ats_value |= AMDGPU_PDE_PTE; |
804 | 821 | ||
805 | ats_value = AMDGPU_PTE_DEFAULT_ATC; | 822 | amdgpu_vm_set_pte_pde(adev, &job->ibs[0], addr, 0, |
806 | if (level != AMDGPU_VM_PTB) | 823 | ats_entries, 0, ats_value); |
807 | ats_value |= AMDGPU_PDE_PTE; | 824 | addr += ats_entries * 8; |
825 | } | ||
808 | 826 | ||
809 | amdgpu_vm_set_pte_pde(adev, &job->ibs[0], addr, 0, | 827 | if (entries) { |
810 | ats_entries, 0, ats_value); | 828 | uint64_t value = 0; |
811 | addr += ats_entries * 8; | ||
812 | } | ||
813 | 829 | ||
814 | if (entries) { | 830 | /* Workaround for fault priority problem on GMC9 */ |
815 | uint64_t value = 0; | 831 | if (level == AMDGPU_VM_PTB && |
832 | adev->asic_type >= CHIP_VEGA10) | ||
833 | value = AMDGPU_PTE_EXECUTABLE; | ||
816 | 834 | ||
817 | /* Workaround for fault priority problem on GMC9 */ | 835 | amdgpu_vm_set_pte_pde(adev, &job->ibs[0], addr, 0, |
818 | if (level == AMDGPU_VM_PTB && adev->asic_type >= CHIP_VEGA10) | 836 | entries, 0, value); |
819 | value = AMDGPU_PTE_EXECUTABLE; | 837 | } |
820 | 838 | ||
821 | amdgpu_vm_set_pte_pde(adev, &job->ibs[0], addr, 0, | 839 | bo = bo->shadow; |
822 | entries, 0, value); | 840 | } while (bo); |
823 | } | ||
824 | 841 | ||
825 | amdgpu_ring_pad_ib(ring, &job->ibs[0]); | 842 | amdgpu_ring_pad_ib(ring, &job->ibs[0]); |
826 | 843 | ||
827 | WARN_ON(job->ibs[0].length_dw > 64); | 844 | WARN_ON(job->ibs[0].length_dw > 64); |
828 | r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.resv, | 845 | r = amdgpu_sync_resv(adev, &job->sync, vm->root.base.bo->tbo.resv, |
829 | AMDGPU_FENCE_OWNER_KFD, false); | 846 | AMDGPU_FENCE_OWNER_KFD, false); |
830 | if (r) | 847 | if (r) |
831 | goto error_free; | 848 | goto error_free; |
@@ -835,19 +852,13 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev, | |||
835 | if (r) | 852 | if (r) |
836 | goto error_free; | 853 | goto error_free; |
837 | 854 | ||
838 | amdgpu_bo_fence(bo, fence, true); | 855 | amdgpu_bo_fence(vm->root.base.bo, fence, true); |
839 | dma_fence_put(fence); | 856 | dma_fence_put(fence); |
840 | 857 | ||
841 | if (bo->shadow) | ||
842 | return amdgpu_vm_clear_bo(adev, vm, bo->shadow, | ||
843 | level, pte_support_ats); | ||
844 | |||
845 | return 0; | 858 | return 0; |
846 | 859 | ||
847 | error_free: | 860 | error_free: |
848 | amdgpu_job_free(job); | 861 | amdgpu_job_free(job); |
849 | |||
850 | error: | ||
851 | return r; | 862 | return r; |
852 | } | 863 | } |
853 | 864 | ||