diff options
author | Yong Zhao <Yong.Zhao@amd.com> | 2017-08-31 15:55:00 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-10-09 16:30:16 -0400 |
commit | 6d16dac85c081825af58111023428c43d1da7e1a (patch) | |
tree | 904e12343e7d412909b913952145a72c21c27cdb /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |
parent | bb7a9c8d712f37385a706a594d6edf6e6d2669d0 (diff) |
drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
Without the additional bits set in PDEs/PTEs, the ATC memory access
would have failed on Raven.
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index fee0a32ac56f..b500bb6a8491 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |||
@@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev, | |||
328 | AMDGPU_GEM_CREATE_SHADOW); | 328 | AMDGPU_GEM_CREATE_SHADOW); |
329 | 329 | ||
330 | if (vm->pte_support_ats) { | 330 | if (vm->pte_support_ats) { |
331 | init_value = AMDGPU_PTE_SYSTEM; | 331 | init_value = AMDGPU_PTE_DEFAULT_ATC; |
332 | if (level != adev->vm_manager.num_level - 1) | 332 | if (level != adev->vm_manager.num_level - 1) |
333 | init_value |= AMDGPU_PDE_PTE; | 333 | init_value |= AMDGPU_PDE_PTE; |
334 | |||
334 | } | 335 | } |
335 | 336 | ||
336 | /* walk over the address space and allocate the page tables */ | 337 | /* walk over the address space and allocate the page tables */ |
@@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev, | |||
2017 | list_del(&mapping->list); | 2018 | list_del(&mapping->list); |
2018 | 2019 | ||
2019 | if (vm->pte_support_ats) | 2020 | if (vm->pte_support_ats) |
2020 | init_pte_value = AMDGPU_PTE_SYSTEM; | 2021 | init_pte_value = AMDGPU_PTE_DEFAULT_ATC; |
2021 | 2022 | ||
2022 | r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm, | 2023 | r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm, |
2023 | mapping->start, mapping->last, | 2024 | mapping->start, mapping->last, |
@@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, | |||
2629 | 2630 | ||
2630 | if (adev->asic_type == CHIP_RAVEN) { | 2631 | if (adev->asic_type == CHIP_RAVEN) { |
2631 | vm->pte_support_ats = true; | 2632 | vm->pte_support_ats = true; |
2632 | init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE; | 2633 | init_pde_value = AMDGPU_PTE_DEFAULT_ATC |
2634 | | AMDGPU_PDE_PTE; | ||
2635 | |||
2633 | } | 2636 | } |
2634 | } else | 2637 | } else |
2635 | vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & | 2638 | vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & |