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authorJason Gunthorpe <jgg@mellanox.com>2018-09-05 18:21:22 -0400
committerJason Gunthorpe <jgg@mellanox.com>2018-09-05 18:21:22 -0400
commit2c910cb75e1fe6de52d95c8e32caedd1629a33a5 (patch)
tree94a0eea6f8cde689d11e7583ddd0a930b8785ab4 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
parent627212c9d49ba2759b699450f5d8f45f73e062fa (diff)
parentb53b1c08a23eb1091982daacb2122f90a7094a77 (diff)
Merge branch 'uverbs_dev_cleanups' into rdma.git for-next
For dependencies, branch based on rdma.git 'for-rc' of https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git/ Pull 'uverbs_dev_cleanups' from Leon Romanovsky: ==================== Reuse the char device code interfaces to simplify ib_uverbs_device creation and destruction. As part of this series, we are sending fix to cleanup path, which was discovered during internal review, The fix definitely can go to -rc, but it means that this series will be dependent on rdma-rc. ==================== * branch 'uverbs_dev_cleanups': RDMA/uverbs: Use device.groups to initialize device attributes RDMA/uverbs: Use cdev_device_add() instead of cdev_add() RDMA/core: Depend on device_add() to add device attributes RDMA/uverbs: Fix error cleanup path of ib_uverbs_add_one() Resolved conflict in ib_device_unregister_sysfs() Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c35
1 files changed, 30 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index ece0ac703e27..b17771dd5ce7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -172,6 +172,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
172 * is validated on next vm use to avoid fault. 172 * is validated on next vm use to avoid fault.
173 * */ 173 * */
174 list_move_tail(&base->vm_status, &vm->evicted); 174 list_move_tail(&base->vm_status, &vm->evicted);
175 base->moved = true;
175} 176}
176 177
177/** 178/**
@@ -369,7 +370,6 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
369 uint64_t addr; 370 uint64_t addr;
370 int r; 371 int r;
371 372
372 addr = amdgpu_bo_gpu_offset(bo);
373 entries = amdgpu_bo_size(bo) / 8; 373 entries = amdgpu_bo_size(bo) / 8;
374 374
375 if (pte_support_ats) { 375 if (pte_support_ats) {
@@ -401,6 +401,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
401 if (r) 401 if (r)
402 goto error; 402 goto error;
403 403
404 addr = amdgpu_bo_gpu_offset(bo);
404 if (ats_entries) { 405 if (ats_entries) {
405 uint64_t ats_value; 406 uint64_t ats_value;
406 407
@@ -2483,28 +2484,52 @@ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size)
2483 * amdgpu_vm_adjust_size - adjust vm size, block size and fragment size 2484 * amdgpu_vm_adjust_size - adjust vm size, block size and fragment size
2484 * 2485 *
2485 * @adev: amdgpu_device pointer 2486 * @adev: amdgpu_device pointer
2486 * @vm_size: the default vm size if it's set auto 2487 * @min_vm_size: the minimum vm size in GB if it's set auto
2487 * @fragment_size_default: Default PTE fragment size 2488 * @fragment_size_default: Default PTE fragment size
2488 * @max_level: max VMPT level 2489 * @max_level: max VMPT level
2489 * @max_bits: max address space size in bits 2490 * @max_bits: max address space size in bits
2490 * 2491 *
2491 */ 2492 */
2492void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size, 2493void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size,
2493 uint32_t fragment_size_default, unsigned max_level, 2494 uint32_t fragment_size_default, unsigned max_level,
2494 unsigned max_bits) 2495 unsigned max_bits)
2495{ 2496{
2497 unsigned int max_size = 1 << (max_bits - 30);
2498 unsigned int vm_size;
2496 uint64_t tmp; 2499 uint64_t tmp;
2497 2500
2498 /* adjust vm size first */ 2501 /* adjust vm size first */
2499 if (amdgpu_vm_size != -1) { 2502 if (amdgpu_vm_size != -1) {
2500 unsigned max_size = 1 << (max_bits - 30);
2501
2502 vm_size = amdgpu_vm_size; 2503 vm_size = amdgpu_vm_size;
2503 if (vm_size > max_size) { 2504 if (vm_size > max_size) {
2504 dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n", 2505 dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n",
2505 amdgpu_vm_size, max_size); 2506 amdgpu_vm_size, max_size);
2506 vm_size = max_size; 2507 vm_size = max_size;
2507 } 2508 }
2509 } else {
2510 struct sysinfo si;
2511 unsigned int phys_ram_gb;
2512
2513 /* Optimal VM size depends on the amount of physical
2514 * RAM available. Underlying requirements and
2515 * assumptions:
2516 *
2517 * - Need to map system memory and VRAM from all GPUs
2518 * - VRAM from other GPUs not known here
2519 * - Assume VRAM <= system memory
2520 * - On GFX8 and older, VM space can be segmented for
2521 * different MTYPEs
2522 * - Need to allow room for fragmentation, guard pages etc.
2523 *
2524 * This adds up to a rough guess of system memory x3.
2525 * Round up to power of two to maximize the available
2526 * VM size with the given page table size.
2527 */
2528 si_meminfo(&si);
2529 phys_ram_gb = ((uint64_t)si.totalram * si.mem_unit +
2530 (1 << 30) - 1) >> 30;
2531 vm_size = roundup_pow_of_two(
2532 min(max(phys_ram_gb * 3, min_vm_size), max_size));
2508 } 2533 }
2509 2534
2510 adev->vm_manager.max_pfn = (uint64_t)vm_size << 18; 2535 adev->vm_manager.max_pfn = (uint64_t)vm_size << 18;