drm/amdgpu/virt: use kiq to access registers (v2)

For virtualization, it is must for driver to use KIQ to access
registers when it is out of GPU full access mode.

v2: agd: rebase

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 58 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index cfc47214161a..00583baab132 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -91,3 +91,61 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm)
         ttm_eu_backoff_reservation(&ticket, &list);
         return 0;
 }
+
+void amdgpu_virt_init_setting(struct amdgpu_device *adev)
+{
+        mutex_init(&adev->virt.lock);
+}
+
+uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg)
+{
+        signed long r;
+        uint32_t val;
+        struct dma_fence *f;
+        struct amdgpu_kiq *kiq = &adev->gfx.kiq;
+        struct amdgpu_ring *ring = &kiq->ring;
+
+        BUG_ON(!ring->funcs->emit_rreg);
+
+        mutex_lock(&adev->virt.lock);
+        amdgpu_ring_alloc(ring, 32);
+        amdgpu_ring_emit_hdp_flush(ring);
+        amdgpu_ring_emit_rreg(ring, reg);
+        amdgpu_ring_emit_hdp_invalidate(ring);
+        amdgpu_fence_emit(ring, &f);
+        amdgpu_ring_commit(ring);
+        mutex_unlock(&adev->virt.lock);
+
+        r = dma_fence_wait(f, false);
+        if (r)
+                DRM_ERROR("wait for kiq fence error: %ld.\n", r);
+        dma_fence_put(f);
+
+        val = adev->wb.wb[adev->virt.reg_val_offs];
+
+        return val;
+}
+
+void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
+{
+        signed long r;
+        struct dma_fence *f;
+        struct amdgpu_kiq *kiq = &adev->gfx.kiq;
+        struct amdgpu_ring *ring = &kiq->ring;
+
+        BUG_ON(!ring->funcs->emit_wreg);
+
+        mutex_lock(&adev->virt.lock);
+        amdgpu_ring_alloc(ring, 32);
+        amdgpu_ring_emit_hdp_flush(ring);
+        amdgpu_ring_emit_wreg(ring, reg, v);
+        amdgpu_ring_emit_hdp_invalidate(ring);
+        amdgpu_fence_emit(ring, &f);
+        amdgpu_ring_commit(ring);
+        mutex_unlock(&adev->virt.lock);
+
+        r = dma_fence_wait(f, false);
+        if (r)
+                DRM_ERROR("wait for kiq fence error: %ld.\n", r);
+        dma_fence_put(f);
+}