diff options
author | Christian König <christian.koenig@amd.com> | 2018-10-25 04:49:07 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-11-05 15:49:40 -0500 |
commit | af5fe1e96aa156886f89282371fce1629fcc9f6a (patch) | |
tree | 317a9aaf3281c1ec56c9d0ed3a8039343d107014 /drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | |
parent | 5c76c6a8975e1d074dc5763d3f46c928bc7d6484 (diff) |
drm/amdgpu: cleanup GMC v9 TLB invalidation
Move the kiq handling into amdgpu_virt.c and drop the fallback.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index ff887639bfa3..cfee74732edb 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | |||
@@ -132,6 +132,46 @@ failed_kiq_write: | |||
132 | pr_err("failed to write reg:%x\n", reg); | 132 | pr_err("failed to write reg:%x\n", reg); |
133 | } | 133 | } |
134 | 134 | ||
135 | void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev, | ||
136 | uint32_t reg0, uint32_t reg1, | ||
137 | uint32_t ref, uint32_t mask) | ||
138 | { | ||
139 | struct amdgpu_kiq *kiq = &adev->gfx.kiq; | ||
140 | struct amdgpu_ring *ring = &kiq->ring; | ||
141 | signed long r, cnt = 0; | ||
142 | unsigned long flags; | ||
143 | uint32_t seq; | ||
144 | |||
145 | spin_lock_irqsave(&kiq->ring_lock, flags); | ||
146 | amdgpu_ring_alloc(ring, 32); | ||
147 | amdgpu_ring_emit_reg_write_reg_wait(ring, reg0, reg1, | ||
148 | ref, mask); | ||
149 | amdgpu_fence_emit_polling(ring, &seq); | ||
150 | amdgpu_ring_commit(ring); | ||
151 | spin_unlock_irqrestore(&kiq->ring_lock, flags); | ||
152 | |||
153 | r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); | ||
154 | |||
155 | /* don't wait anymore for IRQ context */ | ||
156 | if (r < 1 && in_interrupt()) | ||
157 | goto failed_kiq; | ||
158 | |||
159 | might_sleep(); | ||
160 | while (r < 1 && cnt++ < MAX_KIQ_REG_TRY) { | ||
161 | |||
162 | msleep(MAX_KIQ_REG_BAILOUT_INTERVAL); | ||
163 | r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); | ||
164 | } | ||
165 | |||
166 | if (cnt > MAX_KIQ_REG_TRY) | ||
167 | goto failed_kiq; | ||
168 | |||
169 | return; | ||
170 | |||
171 | failed_kiq: | ||
172 | pr_err("failed to write reg %x wait reg %x\n", reg0, reg1); | ||
173 | } | ||
174 | |||
135 | /** | 175 | /** |
136 | * amdgpu_virt_request_full_gpu() - request full gpu access | 176 | * amdgpu_virt_request_full_gpu() - request full gpu access |
137 | * @amdgpu: amdgpu device. | 177 | * @amdgpu: amdgpu device. |