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authorChristian König <christian.koenig@amd.com>2015-06-12 08:16:20 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-06-29 11:21:47 -0400
commitdc78330a8e07285a26f165242c3a86744ef3ad20 (patch)
treecbf60ec43092f624bfa820aff64d6bcb56873bc2 /drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
parent2f4b936869e6432a3361217da7e071d4c0c662f6 (diff)
drm/amdgpu: check VCE feedback and bitstream index
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 70181c1da91b..d3ca73090e39 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -469,20 +469,24 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
469 * Patch relocation inside command stream with real buffer address 469 * Patch relocation inside command stream with real buffer address
470 */ 470 */
471static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx, 471static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,
472 int lo, int hi, unsigned size) 472 int lo, int hi, unsigned size, uint32_t index)
473{ 473{
474 struct amdgpu_bo_va_mapping *mapping; 474 struct amdgpu_bo_va_mapping *mapping;
475 struct amdgpu_ib *ib = &p->ibs[ib_idx]; 475 struct amdgpu_ib *ib = &p->ibs[ib_idx];
476 struct amdgpu_bo *bo; 476 struct amdgpu_bo *bo;
477 uint64_t addr; 477 uint64_t addr;
478 478
479 if (index == 0xffffffff)
480 index = 0;
481
479 addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) | 482 addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) |
480 ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32; 483 ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32;
484 addr += ((uint64_t)size) * ((uint64_t)index);
481 485
482 mapping = amdgpu_cs_find_mapping(p, addr, &bo); 486 mapping = amdgpu_cs_find_mapping(p, addr, &bo);
483 if (mapping == NULL) { 487 if (mapping == NULL) {
484 DRM_ERROR("Can't find BO for addr 0x%010Lx %d %d\n", 488 DRM_ERROR("Can't find BO for addr 0x%010Lx %d %d %d %d\n",
485 addr, lo, hi); 489 addr, lo, hi, size, index);
486 return -EINVAL; 490 return -EINVAL;
487 } 491 }
488 492
@@ -495,6 +499,7 @@ static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,
495 499
496 addr -= ((uint64_t)mapping->it.start) * AMDGPU_GPU_PAGE_SIZE; 500 addr -= ((uint64_t)mapping->it.start) * AMDGPU_GPU_PAGE_SIZE;
497 addr += amdgpu_bo_gpu_offset(bo); 501 addr += amdgpu_bo_gpu_offset(bo);
502 addr -= ((uint64_t)size) * ((uint64_t)index);
498 503
499 ib->ptr[lo] = addr & 0xFFFFFFFF; 504 ib->ptr[lo] = addr & 0xFFFFFFFF;
500 ib->ptr[hi] = addr >> 32; 505 ib->ptr[hi] = addr >> 32;
@@ -553,6 +558,7 @@ static int amdgpu_vce_validate_handle(struct amdgpu_cs_parser *p,
553int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx) 558int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
554{ 559{
555 struct amdgpu_ib *ib = &p->ibs[ib_idx]; 560 struct amdgpu_ib *ib = &p->ibs[ib_idx];
561 unsigned fb_idx = 0, bs_idx = 0;
556 int session_idx = -1; 562 int session_idx = -1;
557 bool destroyed = false; 563 bool destroyed = false;
558 bool created = false; 564 bool created = false;
@@ -590,6 +596,8 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
590 break; 596 break;
591 597
592 case 0x00000002: // task info 598 case 0x00000002: // task info
599 fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6);
600 bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7);
593 break; 601 break;
594 602
595 case 0x01000001: // create 603 case 0x01000001: // create
@@ -616,12 +624,12 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
616 624
617 case 0x03000001: // encode 625 case 0x03000001: // encode
618 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9, 626 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9,
619 *size); 627 *size, 0);
620 if (r) 628 if (r)
621 goto out; 629 goto out;
622 630
623 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 12, idx + 11, 631 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 12, idx + 11,
624 *size / 3); 632 *size / 3, 0);
625 if (r) 633 if (r)
626 goto out; 634 goto out;
627 break; 635 break;
@@ -632,7 +640,7 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
632 640
633 case 0x05000001: // context buffer 641 case 0x05000001: // context buffer
634 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, 642 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,
635 *size * 2); 643 *size * 2, 0);
636 if (r) 644 if (r)
637 goto out; 645 goto out;
638 break; 646 break;
@@ -640,14 +648,14 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
640 case 0x05000004: // video bitstream buffer 648 case 0x05000004: // video bitstream buffer
641 tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4); 649 tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4);
642 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, 650 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,
643 tmp); 651 tmp, bs_idx);
644 if (r) 652 if (r)
645 goto out; 653 goto out;
646 break; 654 break;
647 655
648 case 0x05000005: // feedback buffer 656 case 0x05000005: // feedback buffer
649 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, 657 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,
650 4096); 658 4096, fb_idx);
651 if (r) 659 if (r)
652 goto out; 660 goto out;
653 break; 661 break;