diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-02-26 15:34:42 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-02-26 15:34:42 -0500 |
commit | 8e22e1b3499a446df48c2b26667ca36c55bf864c (patch) | |
tree | 5329f98b3eb3c95a9dcbab0fa4f9b6e62f0e788d /drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | |
parent | 00d3c14f14d51babd8aeafd5fa734ccf04f5ca3d (diff) | |
parent | 64a577196d66b44e37384bc5c4d78c61f59d5b2a (diff) |
Merge airlied/drm-next into drm-misc-next
Backmerge the main pull request to sync up with all the newly landed
drivers. Otherwise we'll have chaos even before 4.12 started in
earnest.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c index 79bc9c7aad45..e2c06780ce49 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | |||
@@ -321,6 +321,10 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work) | |||
321 | amdgpu_dpm_enable_vce(adev, false); | 321 | amdgpu_dpm_enable_vce(adev, false); |
322 | } else { | 322 | } else { |
323 | amdgpu_asic_set_vce_clocks(adev, 0, 0); | 323 | amdgpu_asic_set_vce_clocks(adev, 0, 0); |
324 | amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE, | ||
325 | AMD_PG_STATE_GATE); | ||
326 | amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE, | ||
327 | AMD_CG_STATE_GATE); | ||
324 | } | 328 | } |
325 | } else { | 329 | } else { |
326 | schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT); | 330 | schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT); |
@@ -346,6 +350,11 @@ void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring) | |||
346 | amdgpu_dpm_enable_vce(adev, true); | 350 | amdgpu_dpm_enable_vce(adev, true); |
347 | } else { | 351 | } else { |
348 | amdgpu_asic_set_vce_clocks(adev, 53300, 40000); | 352 | amdgpu_asic_set_vce_clocks(adev, 53300, 40000); |
353 | amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE, | ||
354 | AMD_CG_STATE_UNGATE); | ||
355 | amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE, | ||
356 | AMD_PG_STATE_UNGATE); | ||
357 | |||
349 | } | 358 | } |
350 | } | 359 | } |
351 | mutex_unlock(&adev->vce.idle_mutex); | 360 | mutex_unlock(&adev->vce.idle_mutex); |