diff options
author | Dave Airlie <airlied@redhat.com> | 2015-09-03 23:06:29 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2015-09-03 23:06:29 -0400 |
commit | 99495589aa4de7166af254bc497cdbe133fc24bb (patch) | |
tree | d525e957854064f2492976e9beb8a04dddc28143 /drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | |
parent | 879a37d00f1882b1e56a66e626af4194d592d257 (diff) | |
parent | bddf8026386927985ef6d0d11c3ba78f70b76bad (diff) |
Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
More fixes for radeon and amdgpu for 4.3:
- Send full DP aux address fixes for radeon and amdgpu
- Fix an HDMI display regression for pre-DCE5 parts
- UVD suspend fixes for amdgpu
- Add an rs480 suspend quirk
- Fix bo reserve handling in amdgpu GEM_OP ioctl
- GPU scheduler fixes
- SDMA optimizations
- MEC fix for Fiji
* 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (21 commits)
drm/amdgpu: set MEC doorbell range for Fiji
drm/amdgpu: implement burst NOP for SDMA
drm/amdgpu: add insert_nop ring func and default implementation
drm/amdgpu: add amdgpu_get_sdma_instance helper function
drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES
drm/amdgpu: add burst_nop flag for sdma
drm/amdgpu: add count field for the SDMA NOP packet v2
drm/amdgpu: use PT for VM sync on unmap
drm/amdgpu: make wait_event uninterruptible in push_job
drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2
drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()" v2
Add radeon suspend/resume quirk for HP Compaq dc5750.
drm/amdgpu: re-work sync_resv
drm/amdgpu/atom: Send out the full AUX address
drm/radeon/native: Send out the full AUX address
drm/radeon/atom: Send out the full AUX address
drm/amdgpu: use IB for fill_buffer instead of direct command
drm/amdgpu: stop trying to suspend UVD sessions v2
drm/amdgpu: add scheduler dependency callback v2
drm/amdgpu: let the scheduler work more with jobs v2
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 42 |
1 files changed, 19 insertions, 23 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index b87355ccfb1d..3ad4a83c418f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | |||
@@ -221,31 +221,32 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev) | |||
221 | 221 | ||
222 | int amdgpu_uvd_suspend(struct amdgpu_device *adev) | 222 | int amdgpu_uvd_suspend(struct amdgpu_device *adev) |
223 | { | 223 | { |
224 | unsigned size; | 224 | struct amdgpu_ring *ring = &adev->uvd.ring; |
225 | void *ptr; | 225 | int i, r; |
226 | const struct common_firmware_header *hdr; | ||
227 | int i; | ||
228 | 226 | ||
229 | if (adev->uvd.vcpu_bo == NULL) | 227 | if (adev->uvd.vcpu_bo == NULL) |
230 | return 0; | 228 | return 0; |
231 | 229 | ||
232 | for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) | 230 | for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) { |
233 | if (atomic_read(&adev->uvd.handles[i])) | 231 | uint32_t handle = atomic_read(&adev->uvd.handles[i]); |
234 | break; | 232 | if (handle != 0) { |
235 | 233 | struct fence *fence; | |
236 | if (i == AMDGPU_MAX_UVD_HANDLES) | ||
237 | return 0; | ||
238 | 234 | ||
239 | hdr = (const struct common_firmware_header *)adev->uvd.fw->data; | 235 | amdgpu_uvd_note_usage(adev); |
240 | 236 | ||
241 | size = amdgpu_bo_size(adev->uvd.vcpu_bo); | 237 | r = amdgpu_uvd_get_destroy_msg(ring, handle, &fence); |
242 | size -= le32_to_cpu(hdr->ucode_size_bytes); | 238 | if (r) { |
239 | DRM_ERROR("Error destroying UVD (%d)!\n", r); | ||
240 | continue; | ||
241 | } | ||
243 | 242 | ||
244 | ptr = adev->uvd.cpu_addr; | 243 | fence_wait(fence, false); |
245 | ptr += le32_to_cpu(hdr->ucode_size_bytes); | 244 | fence_put(fence); |
246 | 245 | ||
247 | adev->uvd.saved_bo = kmalloc(size, GFP_KERNEL); | 246 | adev->uvd.filp[i] = NULL; |
248 | memcpy(adev->uvd.saved_bo, ptr, size); | 247 | atomic_set(&adev->uvd.handles[i], 0); |
248 | } | ||
249 | } | ||
249 | 250 | ||
250 | return 0; | 251 | return 0; |
251 | } | 252 | } |
@@ -270,12 +271,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) | |||
270 | ptr = adev->uvd.cpu_addr; | 271 | ptr = adev->uvd.cpu_addr; |
271 | ptr += le32_to_cpu(hdr->ucode_size_bytes); | 272 | ptr += le32_to_cpu(hdr->ucode_size_bytes); |
272 | 273 | ||
273 | if (adev->uvd.saved_bo != NULL) { | 274 | memset(ptr, 0, size); |
274 | memcpy(ptr, adev->uvd.saved_bo, size); | ||
275 | kfree(adev->uvd.saved_bo); | ||
276 | adev->uvd.saved_bo = NULL; | ||
277 | } else | ||
278 | memset(ptr, 0, size); | ||
279 | 275 | ||
280 | return 0; | 276 | return 0; |
281 | } | 277 | } |