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authorMonk Liu <Monk.Liu@amd.com>2018-01-19 07:29:17 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-02-28 14:18:06 -0500
commit14a8032aac5f6c5e903dcb22e177132c15c51c25 (patch)
tree10c4584ddbe0c25fa33090391d210823f3756a15 /drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
parent63b2b08b57d978833db36a047179404c40a52b09 (diff)
drm/amdgpu: don't use MM idle_work for SRIOV(v2)
SRIOV doesn't give VF cg/pg feature so the MM's idle_work is skipped for SR-IOV v2: remove superfluous changes since idle_work is not scheduled for SR-IOV so the condition check for SR-IOV inside idle_work also can be dropped v3: drop the SRIOV check in amdgpu_vce/uvd_suspend Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 9cd5517a4fa9..7ad814d0a487 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1116,9 +1116,6 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
1116 container_of(work, struct amdgpu_device, uvd.idle_work.work); 1116 container_of(work, struct amdgpu_device, uvd.idle_work.work);
1117 unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.ring); 1117 unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.ring);
1118 1118
1119 if (amdgpu_sriov_vf(adev))
1120 return;
1121
1122 if (fences == 0) { 1119 if (fences == 0) {
1123 if (adev->pm.dpm_enabled) { 1120 if (adev->pm.dpm_enabled) {
1124 amdgpu_dpm_enable_uvd(adev, false); 1121 amdgpu_dpm_enable_uvd(adev, false);
@@ -1138,11 +1135,12 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
1138void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring) 1135void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
1139{ 1136{
1140 struct amdgpu_device *adev = ring->adev; 1137 struct amdgpu_device *adev = ring->adev;
1141 bool set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work); 1138 bool set_clocks;
1142 1139
1143 if (amdgpu_sriov_vf(adev)) 1140 if (amdgpu_sriov_vf(adev))
1144 return; 1141 return;
1145 1142
1143 set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
1146 if (set_clocks) { 1144 if (set_clocks) {
1147 if (adev->pm.dpm_enabled) { 1145 if (adev->pm.dpm_enabled) {
1148 amdgpu_dpm_enable_uvd(adev, true); 1146 amdgpu_dpm_enable_uvd(adev, true);
@@ -1158,7 +1156,8 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
1158 1156
1159void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring) 1157void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring)
1160{ 1158{
1161 schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT); 1159 if (!amdgpu_sriov_vf(ring->adev))
1160 schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
1162} 1161}
1163 1162
1164/** 1163/**