diff options
author | Huang Rui <ray.huang@amd.com> | 2018-08-02 05:47:15 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-08-27 12:09:55 -0400 |
commit | 55560046d5b0495833cc2cb3de43bbf4425da234 (patch) | |
tree | 8c405d76c78d7923bd0d9770798cccf21d781295 /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | |
parent | bb7743bc205177440ba98eca2359779ba943e03b (diff) |
drm/amdgpu: move firmware definitions into amdgpu_ucode header
Demangle amdgpu.h.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h index bdc472b6e641..a1edc70da979 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | |||
@@ -205,6 +205,12 @@ enum AMDGPU_UCODE_STATUS { | |||
205 | AMDGPU_UCODE_STATUS_LOADED, | 205 | AMDGPU_UCODE_STATUS_LOADED, |
206 | }; | 206 | }; |
207 | 207 | ||
208 | enum amdgpu_firmware_load_type { | ||
209 | AMDGPU_FW_LOAD_DIRECT = 0, | ||
210 | AMDGPU_FW_LOAD_SMU, | ||
211 | AMDGPU_FW_LOAD_PSP, | ||
212 | }; | ||
213 | |||
208 | /* conform to smu_ucode_xfer_cz.h */ | 214 | /* conform to smu_ucode_xfer_cz.h */ |
209 | #define AMDGPU_SDMA0_UCODE_LOADED 0x00000001 | 215 | #define AMDGPU_SDMA0_UCODE_LOADED 0x00000001 |
210 | #define AMDGPU_SDMA1_UCODE_LOADED 0x00000002 | 216 | #define AMDGPU_SDMA1_UCODE_LOADED 0x00000002 |
@@ -232,6 +238,24 @@ struct amdgpu_firmware_info { | |||
232 | uint32_t tmr_mc_addr_hi; | 238 | uint32_t tmr_mc_addr_hi; |
233 | }; | 239 | }; |
234 | 240 | ||
241 | struct amdgpu_firmware { | ||
242 | struct amdgpu_firmware_info ucode[AMDGPU_UCODE_ID_MAXIMUM]; | ||
243 | enum amdgpu_firmware_load_type load_type; | ||
244 | struct amdgpu_bo *fw_buf; | ||
245 | unsigned int fw_size; | ||
246 | unsigned int max_ucodes; | ||
247 | /* firmwares are loaded by psp instead of smu from vega10 */ | ||
248 | const struct amdgpu_psp_funcs *funcs; | ||
249 | struct amdgpu_bo *rbuf; | ||
250 | struct mutex mutex; | ||
251 | |||
252 | /* gpu info firmware data pointer */ | ||
253 | const struct firmware *gpu_info_fw; | ||
254 | |||
255 | void *fw_buf_ptr; | ||
256 | uint64_t fw_buf_mc; | ||
257 | }; | ||
258 | |||
235 | void amdgpu_ucode_print_mc_hdr(const struct common_firmware_header *hdr); | 259 | void amdgpu_ucode_print_mc_hdr(const struct common_firmware_header *hdr); |
236 | void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr); | 260 | void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr); |
237 | void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr); | 261 | void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr); |