diff options
author | Huang Rui <ray.huang@amd.com> | 2018-01-22 07:48:14 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-15 14:43:36 -0400 |
commit | 621a6318adea69b08a3652c64bc7cc0cb4dacfb4 (patch) | |
tree | 8813a932613f5e929ba4a84ce27efb7dde0d2d22 /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | |
parent | d40e9b13c8bad15e56f2e8c9572f62c1229833a6 (diff) |
drm/amdgpu: add save restore list cntl gpm and srm firmware support
RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff
function.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c index 84d652599d5b..0c74c09ef3b0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | |||
@@ -337,7 +337,10 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, | |||
337 | (ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1 && | 337 | (ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1 && |
338 | ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2 && | 338 | ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2 && |
339 | ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1_JT && | 339 | ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1_JT && |
340 | ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2_JT)) { | 340 | ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2_JT && |
341 | ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL && | ||
342 | ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM && | ||
343 | ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) { | ||
341 | ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); | 344 | ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); |
342 | 345 | ||
343 | memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + | 346 | memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + |
@@ -359,6 +362,18 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, | |||
359 | le32_to_cpu(header->ucode_array_offset_bytes) + | 362 | le32_to_cpu(header->ucode_array_offset_bytes) + |
360 | le32_to_cpu(cp_hdr->jt_offset) * 4), | 363 | le32_to_cpu(cp_hdr->jt_offset) * 4), |
361 | ucode->ucode_size); | 364 | ucode->ucode_size); |
365 | } else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL) { | ||
366 | ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; | ||
367 | memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_cntl, | ||
368 | ucode->ucode_size); | ||
369 | } else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM) { | ||
370 | ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; | ||
371 | memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_gpm, | ||
372 | ucode->ucode_size); | ||
373 | } else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) { | ||
374 | ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; | ||
375 | memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm, | ||
376 | ucode->ucode_size); | ||
362 | } | 377 | } |
363 | 378 | ||
364 | return 0; | 379 | return 0; |