diff options
author | Dave Airlie <airlied@redhat.com> | 2017-04-06 15:41:42 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2017-04-06 15:49:12 -0400 |
commit | 0168778115687486575a6831df865dbc4f5369fe (patch) | |
tree | 29a3f1e3348f1ddbc9924611fa0cad738507ba64 /drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |
parent | aed93ee7d03eac9b7d21f08aebe8a7d9ea069e20 (diff) | |
parent | f4e7c7c1b4ed4c28caf679bc94ca5aa096310c10 (diff) |
Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more things for 4.12:
- ttm and amdgpu support for non-contiguous vram CPU mappings
- lots of bug fixes and cleanups for vega10
- misc bug fixes and code cleanups
[airlied: fix do_div error on 32-bit arm, not sure it's 100% correct]
* 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits)
drm/amdgpu: use uintptr_t instead of unsigned long to store pointer
drm/amdgpu: Avoid using signed integer to store pointer value
drm/amdgpu:invoke new implemented AI MB func
drm/amdgpu/vega10:timeout set to equal with VI
drm/amdgpu:implement the reset MB func for vega10
drm/amdgpu:fix typo for mxgpu_ai
drm/amdgpu:no need to involv HDP in KIQ
drm/amdgpu:add PSP block only load_type=PSP (v2)
drm/amdgpu/smu9: update to latest driver interface
drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
drm/amd/amdgpu: Drop gfx_v9_0_print_status()
drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
drm/amdgpu: Move function amdgpu_has_atpx near other similar functions
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 40 |
1 files changed, 12 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 244bb9aacf86..7e993259c2e9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |||
@@ -529,40 +529,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ | |||
529 | case TTM_PL_TT: | 529 | case TTM_PL_TT: |
530 | break; | 530 | break; |
531 | case TTM_PL_VRAM: | 531 | case TTM_PL_VRAM: |
532 | if (mem->start == AMDGPU_BO_INVALID_OFFSET) | ||
533 | return -EINVAL; | ||
534 | |||
535 | mem->bus.offset = mem->start << PAGE_SHIFT; | 532 | mem->bus.offset = mem->start << PAGE_SHIFT; |
536 | /* check if it's visible */ | 533 | /* check if it's visible */ |
537 | if ((mem->bus.offset + mem->bus.size) > adev->mc.visible_vram_size) | 534 | if ((mem->bus.offset + mem->bus.size) > adev->mc.visible_vram_size) |
538 | return -EINVAL; | 535 | return -EINVAL; |
539 | mem->bus.base = adev->mc.aper_base; | 536 | mem->bus.base = adev->mc.aper_base; |
540 | mem->bus.is_iomem = true; | 537 | mem->bus.is_iomem = true; |
541 | #ifdef __alpha__ | ||
542 | /* | ||
543 | * Alpha: use bus.addr to hold the ioremap() return, | ||
544 | * so we can modify bus.base below. | ||
545 | */ | ||
546 | if (mem->placement & TTM_PL_FLAG_WC) | ||
547 | mem->bus.addr = | ||
548 | ioremap_wc(mem->bus.base + mem->bus.offset, | ||
549 | mem->bus.size); | ||
550 | else | ||
551 | mem->bus.addr = | ||
552 | ioremap_nocache(mem->bus.base + mem->bus.offset, | ||
553 | mem->bus.size); | ||
554 | if (!mem->bus.addr) | ||
555 | return -ENOMEM; | ||
556 | |||
557 | /* | ||
558 | * Alpha: Use just the bus offset plus | ||
559 | * the hose/domain memory base for bus.base. | ||
560 | * It then can be used to build PTEs for VRAM | ||
561 | * access, as done in ttm_bo_vm_fault(). | ||
562 | */ | ||
563 | mem->bus.base = (mem->bus.base & 0x0ffffffffUL) + | ||
564 | adev->ddev->hose->dense_mem_base; | ||
565 | #endif | ||
566 | break; | 538 | break; |
567 | default: | 539 | default: |
568 | return -EINVAL; | 540 | return -EINVAL; |
@@ -574,6 +546,17 @@ static void amdgpu_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_re | |||
574 | { | 546 | { |
575 | } | 547 | } |
576 | 548 | ||
549 | static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo, | ||
550 | unsigned long page_offset) | ||
551 | { | ||
552 | struct drm_mm_node *mm = bo->mem.mm_node; | ||
553 | uint64_t size = mm->size; | ||
554 | uint64_t offset = page_offset; | ||
555 | |||
556 | page_offset = do_div(offset, size); | ||
557 | return (bo->mem.bus.base >> PAGE_SHIFT) + mm->start + page_offset; | ||
558 | } | ||
559 | |||
577 | /* | 560 | /* |
578 | * TTM backend functions. | 561 | * TTM backend functions. |
579 | */ | 562 | */ |
@@ -1089,6 +1072,7 @@ static struct ttm_bo_driver amdgpu_bo_driver = { | |||
1089 | .fault_reserve_notify = &amdgpu_bo_fault_reserve_notify, | 1072 | .fault_reserve_notify = &amdgpu_bo_fault_reserve_notify, |
1090 | .io_mem_reserve = &amdgpu_ttm_io_mem_reserve, | 1073 | .io_mem_reserve = &amdgpu_ttm_io_mem_reserve, |
1091 | .io_mem_free = &amdgpu_ttm_io_mem_free, | 1074 | .io_mem_free = &amdgpu_ttm_io_mem_free, |
1075 | .io_mem_pfn = amdgpu_ttm_io_mem_pfn, | ||
1092 | }; | 1076 | }; |
1093 | 1077 | ||
1094 | int amdgpu_ttm_init(struct amdgpu_device *adev) | 1078 | int amdgpu_ttm_init(struct amdgpu_device *adev) |