Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux into drm-next

More fixes for radeon and amdgpu for 4.3:
- Send full DP aux address fixes for radeon and amdgpu
- Fix an HDMI display regression for pre-DCE5 parts
- UVD suspend fixes for amdgpu
- Add an rs480 suspend quirk
- Fix bo reserve handling in amdgpu GEM_OP ioctl
- GPU scheduler fixes
- SDMA optimizations
- MEC fix for Fiji

* 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (21 commits)
  drm/amdgpu: set MEC doorbell range for Fiji
  drm/amdgpu: implement burst NOP for SDMA
  drm/amdgpu: add insert_nop ring func and default implementation
  drm/amdgpu: add amdgpu_get_sdma_instance helper function
  drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES
  drm/amdgpu: add burst_nop flag for sdma
  drm/amdgpu: add count field for the SDMA NOP packet v2
  drm/amdgpu: use PT for VM sync on unmap
  drm/amdgpu: make wait_event uninterruptible in push_job
  drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2
  drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()" v2
  Add radeon suspend/resume quirk for HP Compaq dc5750.
  drm/amdgpu: re-work sync_resv
  drm/amdgpu/atom: Send out the full AUX address
  drm/radeon/native: Send out the full AUX address
  drm/radeon/atom: Send out the full AUX address
  drm/amdgpu: use IB for fill_buffer instead of direct command
  drm/amdgpu: stop trying to suspend UVD sessions v2
  drm/amdgpu: add scheduler dependency callback v2
  drm/amdgpu: let the scheduler work more with jobs v2
  ...

1 files changed, 40 insertions, 6 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 4fffb2539331..068aeaff7183 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -142,6 +142,18 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
         return 0;
 }
 
+static void *amdgpu_sync_get_owner(struct fence *f)
+{
+        struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
+        struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
+
+        if (s_fence)
+                return s_fence->owner;
+        else if (a_fence)
+                return a_fence->owner;
+        return AMDGPU_FENCE_OWNER_UNDEFINED;
+}
+
 /**
  * amdgpu_sync_resv - use the semaphores to sync to a reservation object
  *
@@ -158,7 +170,7 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
 {
         struct reservation_object_list *flist;
         struct fence *f;
-        struct amdgpu_fence *fence;
+        void *fence_owner;
         unsigned i;
         int r = 0;
 
@@ -176,22 +188,22 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
         for (i = 0; i < flist->shared_count; ++i) {
                 f = rcu_dereference_protected(flist->shared[i],
                                               reservation_object_held(resv));
-                fence = f ? to_amdgpu_fence(f) : NULL;
-                if (fence && fence->ring->adev == adev) {
+                if (amdgpu_sync_same_dev(adev, f)) {
                         /* VM updates are only interesting
                          * for other VM updates and moves.
                          */
+                        fence_owner = amdgpu_sync_get_owner(f);
                         if ((owner != AMDGPU_FENCE_OWNER_MOVE) &&
-                            (fence->owner != AMDGPU_FENCE_OWNER_MOVE) &&
+                            (fence_owner != AMDGPU_FENCE_OWNER_MOVE) &&
                             ((owner == AMDGPU_FENCE_OWNER_VM) !=
-                             (fence->owner == AMDGPU_FENCE_OWNER_VM)))
+                             (fence_owner == AMDGPU_FENCE_OWNER_VM)))
                                 continue;
 
                         /* Ignore fence from the same owner as
                          * long as it isn't undefined.
                          */
                         if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
-                            fence->owner == owner)
+                            fence_owner == owner)
                                 continue;
                 }
 
@@ -202,6 +214,28 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
         return r;
 }
 
+struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
+{
+        struct amdgpu_sync_entry *e;
+        struct hlist_node *tmp;
+        struct fence *f;
+        int i;
+
+        hash_for_each_safe(sync->fences, i, tmp, e, node) {
+
+                f = e->fence;
+
+                hash_del(&e->node);
+                kfree(e);
+
+                if (!fence_is_signaled(f))
+                        return f;
+
+                fence_put(f);
+        }
+        return NULL;
+}
+
 int amdgpu_sync_wait(struct amdgpu_sync *sync)
 {
         struct amdgpu_sync_entry *e;