Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next

Last set of features for 4.15.  Highlights:
- Add a bo flag to allow buffers to opt out of implicit sync
- Add ctx priority setting interface
- Lots more powerplay cleanups
- Start to plumb through vram lost infrastructure for gpu reset
- ttm support for huge pages
- misc cleanups and bug fixes

* 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits)
  drm/amd/powerplay: Place the constant on the right side of the test
  drm/amd/powerplay: Remove useless variable
  drm/amd/powerplay: Don't cast kzalloc() return value
  drm/amdgpu: allow GTT overcommit during bind
  drm/amdgpu: linear validate first then bind to GART
  drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.
  drm/amd/pp: thermal control not enabled on vega10.
  drm/amdgpu: busywait KIQ register accessing (v4)
  drm/amdgpu: report more amdgpu_fence_info
  drm/amdgpu:don't check soft_reset for sriov
  drm/amdgpu:fix duplicated setting job's vram_lost
  drm/amdgpu:reduce wb to 512 slot
  drm/amdgpu: fix regresstion on SR-IOV gpu reset failed
  drm/amd/powerplay: Tidy up cz_dpm_powerup_vce()
  drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce()
  drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()
  drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm()
  drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd()
  drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd()
  drm/amd/powerplay: Tidy up cz_start_dpm()
  ...

1 files changed, 109 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
new file mode 100644
index 000000000000..290cc3f9c433
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright 2017 Valve Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Andres Rodriguez <andresx7@gmail.com>
+ */
+
+#include <linux/fdtable.h>
+#include <linux/pid.h>
+#include <drm/amdgpu_drm.h>
+#include "amdgpu.h"
+
+#include "amdgpu_vm.h"
+
+enum amd_sched_priority amdgpu_to_sched_priority(int amdgpu_priority)
+{
+        switch (amdgpu_priority) {
+        case AMDGPU_CTX_PRIORITY_VERY_HIGH:
+                return AMD_SCHED_PRIORITY_HIGH_HW;
+        case AMDGPU_CTX_PRIORITY_HIGH:
+                return AMD_SCHED_PRIORITY_HIGH_SW;
+        case AMDGPU_CTX_PRIORITY_NORMAL:
+                return AMD_SCHED_PRIORITY_NORMAL;
+        case AMDGPU_CTX_PRIORITY_LOW:
+        case AMDGPU_CTX_PRIORITY_VERY_LOW:
+                return AMD_SCHED_PRIORITY_LOW;
+        case AMDGPU_CTX_PRIORITY_UNSET:
+                return AMD_SCHED_PRIORITY_UNSET;
+        default:
+                WARN(1, "Invalid context priority %d\n", amdgpu_priority);
+                return AMD_SCHED_PRIORITY_INVALID;
+        }
+}
+
+static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev,
+                                                  int fd,
+                                                  enum amd_sched_priority priority)
+{
+        struct file *filp = fcheck(fd);
+        struct drm_file *file;
+        struct pid *pid;
+        struct amdgpu_fpriv *fpriv;
+        struct amdgpu_ctx *ctx;
+        uint32_t id;
+
+        if (!filp)
+                return -EINVAL;
+
+        pid = get_pid(((struct drm_file *)filp->private_data)->pid);
+
+        mutex_lock(&adev->ddev->filelist_mutex);
+        list_for_each_entry(file, &adev->ddev->filelist, lhead) {
+                if (file->pid != pid)
+                        continue;
+
+                fpriv = file->driver_priv;
+                idr_for_each_entry(&fpriv->ctx_mgr.ctx_handles, ctx, id)
+                                amdgpu_ctx_priority_override(ctx, priority);
+        }
+        mutex_unlock(&adev->ddev->filelist_mutex);
+
+        put_pid(pid);
+
+        return 0;
+}
+
+int amdgpu_sched_ioctl(struct drm_device *dev, void *data,
+                       struct drm_file *filp)
+{
+        union drm_amdgpu_sched *args = data;
+        struct amdgpu_device *adev = dev->dev_private;
+        enum amd_sched_priority priority;
+        int r;
+
+        priority = amdgpu_to_sched_priority(args->in.priority);
+        if (args->in.flags || priority == AMD_SCHED_PRIORITY_INVALID)
+                return -EINVAL;
+
+        switch (args->in.op) {
+        case AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE:
+                r = amdgpu_sched_process_priority_override(adev,
+                                                           args->in.fd,
+                                                           priority);
+                break;
+        default:
+                DRM_ERROR("Invalid sched op specified: %d\n", args->in.op);
+                r = -EINVAL;
+                break;
+        }
+
+        return r;
+}