aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
diff options
context:
space:
mode:
authorMarek Olšák <marek.olsak@amd.com>2018-04-03 13:05:03 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-05-15 14:43:32 -0400
commitd240cd9eddd943dbe0267d081697195ff1e90b65 (patch)
treeff9648c93738e223b8da42489f5d64aa8caa9895 /drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
parent3f188453faf7ba5b59e8064df4afffbc946e25ec (diff)
drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences
There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 08fcdf6f7b53..4f8dac2d36a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -42,6 +42,7 @@
42 42
43#define AMDGPU_FENCE_FLAG_64BIT (1 << 0) 43#define AMDGPU_FENCE_FLAG_64BIT (1 << 0)
44#define AMDGPU_FENCE_FLAG_INT (1 << 1) 44#define AMDGPU_FENCE_FLAG_INT (1 << 1)
45#define AMDGPU_FENCE_FLAG_TC_WB_ONLY (1 << 2)
45 46
46enum amdgpu_ring_type { 47enum amdgpu_ring_type {
47 AMDGPU_RING_TYPE_GFX, 48 AMDGPU_RING_TYPE_GFX,
@@ -90,7 +91,8 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
90 unsigned irq_type); 91 unsigned irq_type);
91void amdgpu_fence_driver_suspend(struct amdgpu_device *adev); 92void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
92void amdgpu_fence_driver_resume(struct amdgpu_device *adev); 93void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
93int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence); 94int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
95 unsigned flags);
94int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s); 96int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s);
95void amdgpu_fence_process(struct amdgpu_ring *ring); 97void amdgpu_fence_process(struct amdgpu_ring *ring);
96int amdgpu_fence_wait_empty(struct amdgpu_ring *ring); 98int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);