drm/amd/powerplay: refine powerplay interface.

v2: add pp_check function to check pp_instance
   valid.

1. powerplay export two new interface to amdgpu,
   amd_powerplay_create/amd_powerplay_destroy.
2. create pp_instance/smumgr/hwmgr/eventmgr in
   early init, destroy them when lata_fini.
3. in sw_init, create and init asic private smumgr
   data, and free them when sw_fini.
4. in hw_init, create and init asic private hwmgr
   data, and free them when hw_fini.
5. export powerplay state: PP_DPM_DISABLED.
   when user disabled powerplay or hwmgr/eventmgr
   init failed, powerplay return this state to amdgpu.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 52 insertions, 56 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
index b1921c7da36b..8856eccc37fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
@@ -34,63 +34,34 @@
 #include "cik_dpm.h"
 #include "vi_dpm.h"
 
-static int amdgpu_powerplay_init(struct amdgpu_device *adev)
+static int amdgpu_create_pp_handle(struct amdgpu_device *adev)
 {
-        int ret = 0;
+        struct amd_pp_init pp_init;
         struct amd_powerplay *amd_pp;
+        int ret;
 
         amd_pp = &(adev->powerplay);
-
-        if (adev->pp_enabled) {
-                struct amd_pp_init *pp_init;
-
-                pp_init = kzalloc(sizeof(struct amd_pp_init), GFP_KERNEL);
-
-                if (pp_init == NULL)
-                        return -ENOMEM;
-
-                pp_init->chip_family = adev->family;
-                pp_init->chip_id = adev->asic_type;
-                pp_init->device = amdgpu_cgs_create_device(adev);
-                ret = amd_powerplay_init(pp_init, amd_pp);
-                kfree(pp_init);
-        } else {
-                amd_pp->pp_handle = (void *)adev;
-
-                switch (adev->asic_type) {
-#ifdef CONFIG_DRM_AMDGPU_SI
-                case CHIP_TAHITI:
-                case CHIP_PITCAIRN:
-                case CHIP_VERDE:
-                case CHIP_OLAND:
-                case CHIP_HAINAN:
-                        amd_pp->ip_funcs = &si_dpm_ip_funcs;
-                break;
-#endif
-#ifdef CONFIG_DRM_AMDGPU_CIK
-                case CHIP_BONAIRE:
-                case CHIP_HAWAII:
-                        amd_pp->ip_funcs = &ci_dpm_ip_funcs;
-                        break;
-                case CHIP_KABINI:
-                case CHIP_MULLINS:
-                case CHIP_KAVERI:
-                        amd_pp->ip_funcs = &kv_dpm_ip_funcs;
-                        break;
-#endif
-                default:
-                        ret = -EINVAL;
-                        break;
-                }
-        }
-        return ret;
+        pp_init.chip_family = adev->family;
+        pp_init.chip_id = adev->asic_type;
+        pp_init.pm_en = amdgpu_dpm != 0 ? true : false;
+        pp_init.feature_mask = amdgpu_pp_feature_mask;
+        pp_init.device = amdgpu_cgs_create_device(adev);
+        ret = amd_powerplay_create(&pp_init, &(amd_pp->pp_handle));
+        if (ret)
+                return -EINVAL;
+        return 0;
 }
 
 static int amdgpu_pp_early_init(void *handle)
 {
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+        struct amd_powerplay *amd_pp;
         int ret = 0;
 
+        amd_pp = &(adev->powerplay);
+        adev->pp_enabled = false;
+        amd_pp->pp_handle = (void *)adev;
+
         switch (adev->asic_type) {
         case CHIP_POLARIS11:
         case CHIP_POLARIS10:
@@ -101,25 +72,45 @@ static int amdgpu_pp_early_init(void *handle)
         case CHIP_CARRIZO:
         case CHIP_STONEY:
                 adev->pp_enabled = true;
+                if (amdgpu_create_pp_handle(adev))
+                        return -EINVAL;
+                amd_pp->ip_funcs = &pp_ip_funcs;
+                amd_pp->pp_funcs = &pp_dpm_funcs;
                 break;
         /* These chips don't have powerplay implemenations */
+#ifdef CONFIG_DRM_AMDGPU_SI
+        case CHIP_TAHITI:
+        case CHIP_PITCAIRN:
+        case CHIP_VERDE:
+        case CHIP_OLAND:
+        case CHIP_HAINAN:
+                amd_pp->ip_funcs = &si_dpm_ip_funcs;
+        break;
+#endif
+#ifdef CONFIG_DRM_AMDGPU_CIK
         case CHIP_BONAIRE:
         case CHIP_HAWAII:
+                amd_pp->ip_funcs = &ci_dpm_ip_funcs;
+                break;
         case CHIP_KABINI:
         case CHIP_MULLINS:
         case CHIP_KAVERI:
+                amd_pp->ip_funcs = &kv_dpm_ip_funcs;
+                break;
+#endif
         default:
-                adev->pp_enabled = false;
+                ret = -EINVAL;
                 break;
         }
 
-        ret = amdgpu_powerplay_init(adev);
-        if (ret)
-                return ret;
-
         if (adev->powerplay.ip_funcs->early_init)
                 ret = adev->powerplay.ip_funcs->early_init(
                                         adev->powerplay.pp_handle);
+
+        if (ret == PP_DPM_DISABLED) {
+                adev->pm.dpm_enabled = false;
+                return 0;
+        }
         return ret;
 }
 
@@ -179,6 +170,11 @@ static int amdgpu_pp_hw_init(void *handle)
                 ret = adev->powerplay.ip_funcs->hw_init(
                                         adev->powerplay.pp_handle);
 
+        if (ret == PP_DPM_DISABLED) {
+                adev->pm.dpm_enabled = false;
+                return 0;
+        }
+
         if ((amdgpu_dpm != 0) && !amdgpu_sriov_vf(adev))
                 adev->pm.dpm_enabled = true;
 
@@ -204,14 +200,14 @@ static void amdgpu_pp_late_fini(void *handle)
 {
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-        if (adev->pp_enabled) {
-                amdgpu_pm_sysfs_fini(adev);
-                amd_powerplay_fini(adev->powerplay.pp_handle);
-        }
-
         if (adev->powerplay.ip_funcs->late_fini)
                 adev->powerplay.ip_funcs->late_fini(
                           adev->powerplay.pp_handle);
+
+        if (adev->pp_enabled && adev->pm.dpm_enabled)
+                amdgpu_pm_sysfs_fini(adev);
+
+        amd_powerplay_destroy(adev->powerplay.pp_handle);
 }
 
 static int amdgpu_pp_suspend(void *handle)