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authorEric Huang <JinHuiEric.Huang@amd.com>2016-05-24 15:11:17 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-07-07 14:50:55 -0400
commitf2bdc05f773ea68d31e2d50b9e791b7c7dcd1dfa (patch)
treec96bdf08a1ad3d8c22a8475779996aa8cb869ff7 /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
parent6bb6b2972d0affe1f86881d64c787627b916c17e (diff)
drm/amdgpu: add the common code to support mclk OD
This implements mclk OverDrive(OD) through sysfs. The new entry pp_mclk_od is read/write. The value of input/output is an integer of the overclocking percentage. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index d6484d6e60dd..250f8693f170 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -527,6 +527,52 @@ fail:
527 return count; 527 return count;
528} 528}
529 529
530static ssize_t amdgpu_get_pp_mclk_od(struct device *dev,
531 struct device_attribute *attr,
532 char *buf)
533{
534 struct drm_device *ddev = dev_get_drvdata(dev);
535 struct amdgpu_device *adev = ddev->dev_private;
536 uint32_t value = 0;
537
538 if (adev->pp_enabled)
539 value = amdgpu_dpm_get_mclk_od(adev);
540 else if (adev->pm.funcs->get_mclk_od)
541 value = adev->pm.funcs->get_mclk_od(adev);
542
543 return snprintf(buf, PAGE_SIZE, "%d\n", value);
544}
545
546static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
547 struct device_attribute *attr,
548 const char *buf,
549 size_t count)
550{
551 struct drm_device *ddev = dev_get_drvdata(dev);
552 struct amdgpu_device *adev = ddev->dev_private;
553 int ret;
554 long int value;
555
556 ret = kstrtol(buf, 0, &value);
557
558 if (ret) {
559 count = -EINVAL;
560 goto fail;
561 }
562
563 if (adev->pp_enabled) {
564 amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
565 amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_READJUST_POWER_STATE, NULL, NULL);
566 } else if (adev->pm.funcs->set_mclk_od) {
567 adev->pm.funcs->set_mclk_od(adev, (uint32_t)value);
568 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
569 amdgpu_pm_compute_clocks(adev);
570 }
571
572fail:
573 return count;
574}
575
530static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, amdgpu_get_dpm_state, amdgpu_set_dpm_state); 576static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, amdgpu_get_dpm_state, amdgpu_set_dpm_state);
531static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR, 577static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR,
532 amdgpu_get_dpm_forced_performance_level, 578 amdgpu_get_dpm_forced_performance_level,
@@ -551,6 +597,9 @@ static DEVICE_ATTR(pp_dpm_pcie, S_IRUGO | S_IWUSR,
551static DEVICE_ATTR(pp_sclk_od, S_IRUGO | S_IWUSR, 597static DEVICE_ATTR(pp_sclk_od, S_IRUGO | S_IWUSR,
552 amdgpu_get_pp_sclk_od, 598 amdgpu_get_pp_sclk_od,
553 amdgpu_set_pp_sclk_od); 599 amdgpu_set_pp_sclk_od);
600static DEVICE_ATTR(pp_mclk_od, S_IRUGO | S_IWUSR,
601 amdgpu_get_pp_mclk_od,
602 amdgpu_set_pp_mclk_od);
554 603
555static ssize_t amdgpu_hwmon_show_temp(struct device *dev, 604static ssize_t amdgpu_hwmon_show_temp(struct device *dev,
556 struct device_attribute *attr, 605 struct device_attribute *attr,
@@ -1191,6 +1240,11 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
1191 DRM_ERROR("failed to create device file pp_sclk_od\n"); 1240 DRM_ERROR("failed to create device file pp_sclk_od\n");
1192 return ret; 1241 return ret;
1193 } 1242 }
1243 ret = device_create_file(adev->dev, &dev_attr_pp_mclk_od);
1244 if (ret) {
1245 DRM_ERROR("failed to create device file pp_mclk_od\n");
1246 return ret;
1247 }
1194 1248
1195 ret = amdgpu_debugfs_pm_init(adev); 1249 ret = amdgpu_debugfs_pm_init(adev);
1196 if (ret) { 1250 if (ret) {
@@ -1219,6 +1273,7 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
1219 device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk); 1273 device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk);
1220 device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie); 1274 device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie);
1221 device_remove_file(adev->dev, &dev_attr_pp_sclk_od); 1275 device_remove_file(adev->dev, &dev_attr_pp_sclk_od);
1276 device_remove_file(adev->dev, &dev_attr_pp_mclk_od);
1222} 1277}
1223 1278
1224void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) 1279void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)