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authorAlex Deucher <alexander.deucher@amd.com>2016-02-24 17:18:25 -0500
committerAlex Deucher <alexander.deucher@amd.com>2016-03-02 11:01:20 -0500
commiteda1d1cf8d18383f19cd2b752f786120efa4768f (patch)
treec6f6415c1160d2666782cf48c7c969db3328b37a /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
parent6378076bcfdcd1d4f8d726d08d3fa044736873eb (diff)
drm/amdgpu/pm: update current crtc info after setting the powerstate
On CI, we need to see if the number of crtcs changes to determine whether or not we need to upload the mclk table again. In practice we don't currently upload the mclk table again after the initial load. The only reason you would would be to add new states, e.g., for arbitrary mclk setting which is not currently supported. Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 66855b62a603..95a4a25d8df9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -649,9 +649,6 @@ force:
649 /* update display watermarks based on new power state */ 649 /* update display watermarks based on new power state */
650 amdgpu_display_bandwidth_update(adev); 650 amdgpu_display_bandwidth_update(adev);
651 651
652 adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;
653 adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;
654
655 /* wait for the rings to drain */ 652 /* wait for the rings to drain */
656 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { 653 for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
657 struct amdgpu_ring *ring = adev->rings[i]; 654 struct amdgpu_ring *ring = adev->rings[i];
@@ -670,6 +667,9 @@ force:
670 /* update displays */ 667 /* update displays */
671 amdgpu_dpm_display_configuration_changed(adev); 668 amdgpu_dpm_display_configuration_changed(adev);
672 669
670 adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;
671 adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;
672
673 if (adev->pm.funcs->force_performance_level) { 673 if (adev->pm.funcs->force_performance_level) {
674 if (adev->pm.dpm.thermal_active) { 674 if (adev->pm.dpm.thermal_active) {
675 enum amdgpu_dpm_forced_level level = adev->pm.dpm.forced_level; 675 enum amdgpu_dpm_forced_level level = adev->pm.dpm.forced_level;