diff options
author | Likun Gao <Likun.Gao@amd.com> | 2019-01-18 03:15:14 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-03-19 16:04:00 -0400 |
commit | e9c5b46e3c50f58403aeca6d6419b9235d2518b2 (patch) | |
tree | 4a784a14f84124d565f48a6c0c1949b15b1ff5ad /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |
parent | 31535a40802dc96d6ad3aabd957a7283c6996685 (diff) |
drm/amd/powerplay: add sys interface for set sclk_od/mclk_od for smu
Add sys interface for set pp_sclk_od and pp_mclk_od for smu.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index 52cb63030b9a..eb17ab94e4bf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |||
@@ -1069,14 +1069,19 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev, | |||
1069 | count = -EINVAL; | 1069 | count = -EINVAL; |
1070 | goto fail; | 1070 | goto fail; |
1071 | } | 1071 | } |
1072 | if (adev->powerplay.pp_funcs->set_sclk_od) | ||
1073 | amdgpu_dpm_set_sclk_od(adev, (uint32_t)value); | ||
1074 | 1072 | ||
1075 | if (adev->powerplay.pp_funcs->dispatch_tasks) { | 1073 | if (is_support_sw_smu(adev)) { |
1076 | amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); | 1074 | value = smu_set_od_percentage(&(adev->smu), OD_SCLK, (uint32_t)value); |
1077 | } else { | 1075 | } else { |
1078 | adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; | 1076 | if (adev->powerplay.pp_funcs->set_sclk_od) |
1079 | amdgpu_pm_compute_clocks(adev); | 1077 | amdgpu_dpm_set_sclk_od(adev, (uint32_t)value); |
1078 | |||
1079 | if (adev->powerplay.pp_funcs->dispatch_tasks) { | ||
1080 | amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); | ||
1081 | } else { | ||
1082 | adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; | ||
1083 | amdgpu_pm_compute_clocks(adev); | ||
1084 | } | ||
1080 | } | 1085 | } |
1081 | 1086 | ||
1082 | fail: | 1087 | fail: |
@@ -1115,14 +1120,19 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev, | |||
1115 | count = -EINVAL; | 1120 | count = -EINVAL; |
1116 | goto fail; | 1121 | goto fail; |
1117 | } | 1122 | } |
1118 | if (adev->powerplay.pp_funcs->set_mclk_od) | ||
1119 | amdgpu_dpm_set_mclk_od(adev, (uint32_t)value); | ||
1120 | 1123 | ||
1121 | if (adev->powerplay.pp_funcs->dispatch_tasks) { | 1124 | if (is_support_sw_smu(adev)) { |
1122 | amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); | 1125 | value = smu_set_od_percentage(&(adev->smu), OD_MCLK, (uint32_t)value); |
1123 | } else { | 1126 | } else { |
1124 | adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; | 1127 | if (adev->powerplay.pp_funcs->set_mclk_od) |
1125 | amdgpu_pm_compute_clocks(adev); | 1128 | amdgpu_dpm_set_mclk_od(adev, (uint32_t)value); |
1129 | |||
1130 | if (adev->powerplay.pp_funcs->dispatch_tasks) { | ||
1131 | amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); | ||
1132 | } else { | ||
1133 | adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; | ||
1134 | amdgpu_pm_compute_clocks(adev); | ||
1135 | } | ||
1126 | } | 1136 | } |
1127 | 1137 | ||
1128 | fail: | 1138 | fail: |