diff options
author | Eric Huang <JinHuiEric.Huang@amd.com> | 2017-02-07 16:37:48 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:52:52 -0400 |
commit | cd7b0c66ce35e8693a0018b4ce0bc59f46f97bd1 (patch) | |
tree | 311c094f71eb9b73d79b9e436563a580602c775d /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |
parent | 618c0483736f4e963770aa6076cca35935604a12 (diff) |
drm/amd/powerplay: change parameter type pointer from int32_t to void in read sensor
As well as fix print format for uint32_t type.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index fd45212c4b98..fc4d61cf34c1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |||
@@ -1532,7 +1532,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) | |||
1532 | 1532 | ||
1533 | static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *adev) | 1533 | static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *adev) |
1534 | { | 1534 | { |
1535 | int32_t value; | 1535 | uint32_t value; |
1536 | 1536 | ||
1537 | /* sanity check PP is enabled */ | 1537 | /* sanity check PP is enabled */ |
1538 | if (!(adev->powerplay.pp_funcs && | 1538 | if (!(adev->powerplay.pp_funcs && |
@@ -1541,46 +1541,46 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a | |||
1541 | 1541 | ||
1542 | /* GPU Clocks */ | 1542 | /* GPU Clocks */ |
1543 | seq_printf(m, "GFX Clocks and Power:\n"); | 1543 | seq_printf(m, "GFX Clocks and Power:\n"); |
1544 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, &value)) | 1544 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, (void *)&value)) |
1545 | seq_printf(m, "\t%u MHz (MCLK)\n", value/100); | 1545 | seq_printf(m, "\t%u MHz (MCLK)\n", value/100); |
1546 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, &value)) | 1546 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void *)&value)) |
1547 | seq_printf(m, "\t%u MHz (SCLK)\n", value/100); | 1547 | seq_printf(m, "\t%u MHz (SCLK)\n", value/100); |
1548 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, &value)) | 1548 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void *)&value)) |
1549 | seq_printf(m, "\t%u mV (VDDGFX)\n", value); | 1549 | seq_printf(m, "\t%u mV (VDDGFX)\n", value); |
1550 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, &value)) | 1550 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void *)&value)) |
1551 | seq_printf(m, "\t%u mV (VDDNB)\n", value); | 1551 | seq_printf(m, "\t%u mV (VDDNB)\n", value); |
1552 | seq_printf(m, "\n"); | 1552 | seq_printf(m, "\n"); |
1553 | 1553 | ||
1554 | /* GPU Temp */ | 1554 | /* GPU Temp */ |
1555 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, &value)) | 1555 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, (void *)&value)) |
1556 | seq_printf(m, "GPU Temperature: %u C\n", value/1000); | 1556 | seq_printf(m, "GPU Temperature: %u C\n", value/1000); |
1557 | 1557 | ||
1558 | /* GPU Load */ | 1558 | /* GPU Load */ |
1559 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, &value)) | 1559 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, (void *)&value)) |
1560 | seq_printf(m, "GPU Load: %u %%\n", value); | 1560 | seq_printf(m, "GPU Load: %u %%\n", value); |
1561 | seq_printf(m, "\n"); | 1561 | seq_printf(m, "\n"); |
1562 | 1562 | ||
1563 | /* UVD clocks */ | 1563 | /* UVD clocks */ |
1564 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, &value)) { | 1564 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value)) { |
1565 | if (!value) { | 1565 | if (!value) { |
1566 | seq_printf(m, "UVD: Disabled\n"); | 1566 | seq_printf(m, "UVD: Disabled\n"); |
1567 | } else { | 1567 | } else { |
1568 | seq_printf(m, "UVD: Enabled\n"); | 1568 | seq_printf(m, "UVD: Enabled\n"); |
1569 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, &value)) | 1569 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value)) |
1570 | seq_printf(m, "\t%u MHz (DCLK)\n", value/100); | 1570 | seq_printf(m, "\t%u MHz (DCLK)\n", value/100); |
1571 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, &value)) | 1571 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value)) |
1572 | seq_printf(m, "\t%u MHz (VCLK)\n", value/100); | 1572 | seq_printf(m, "\t%u MHz (VCLK)\n", value/100); |
1573 | } | 1573 | } |
1574 | } | 1574 | } |
1575 | seq_printf(m, "\n"); | 1575 | seq_printf(m, "\n"); |
1576 | 1576 | ||
1577 | /* VCE clocks */ | 1577 | /* VCE clocks */ |
1578 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, &value)) { | 1578 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value)) { |
1579 | if (!value) { | 1579 | if (!value) { |
1580 | seq_printf(m, "VCE: Disabled\n"); | 1580 | seq_printf(m, "VCE: Disabled\n"); |
1581 | } else { | 1581 | } else { |
1582 | seq_printf(m, "VCE: Enabled\n"); | 1582 | seq_printf(m, "VCE: Enabled\n"); |
1583 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, &value)) | 1583 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value)) |
1584 | seq_printf(m, "\t%u MHz (ECCLK)\n", value/100); | 1584 | seq_printf(m, "\t%u MHz (ECCLK)\n", value/100); |
1585 | } | 1585 | } |
1586 | } | 1586 | } |