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authorChristian König <christian.koenig@amd.com>2016-01-21 05:28:53 -0500
committerAlex Deucher <alexander.deucher@amd.com>2016-02-10 14:16:58 -0500
commita27de35caab59bacf5c47713856739f86ec06e43 (patch)
tree7452339b06230a40ed9f2986d1c525e1e793173c /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
parenta9a78b329a3e31a977f8d8ef64b2f3a574899992 (diff)
drm/amdgpu: remove the ring lock v2
It's not needed any more because all access goes through the scheduler now. v2: Update commit message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c19
1 files changed, 6 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 7d8d84eaea4a..a0da563c8c82 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -623,14 +623,12 @@ force:
623 amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps); 623 amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps);
624 } 624 }
625 625
626 mutex_lock(&adev->ring_lock);
627
628 /* update whether vce is active */ 626 /* update whether vce is active */
629 ps->vce_active = adev->pm.dpm.vce_active; 627 ps->vce_active = adev->pm.dpm.vce_active;
630 628
631 ret = amdgpu_dpm_pre_set_power_state(adev); 629 ret = amdgpu_dpm_pre_set_power_state(adev);
632 if (ret) 630 if (ret)
633 goto done; 631 return;
634 632
635 /* update display watermarks based on new power state */ 633 /* update display watermarks based on new power state */
636 amdgpu_display_bandwidth_update(adev); 634 amdgpu_display_bandwidth_update(adev);
@@ -667,9 +665,6 @@ force:
667 amdgpu_dpm_force_performance_level(adev, adev->pm.dpm.forced_level); 665 amdgpu_dpm_force_performance_level(adev, adev->pm.dpm.forced_level);
668 } 666 }
669 } 667 }
670
671done:
672 mutex_unlock(&adev->ring_lock);
673} 668}
674 669
675void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) 670void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
@@ -802,13 +797,11 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
802 int i = 0; 797 int i = 0;
803 798
804 amdgpu_display_bandwidth_update(adev); 799 amdgpu_display_bandwidth_update(adev);
805 mutex_lock(&adev->ring_lock); 800 for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
806 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { 801 struct amdgpu_ring *ring = adev->rings[i];
807 struct amdgpu_ring *ring = adev->rings[i]; 802 if (ring && ring->ready)
808 if (ring && ring->ready) 803 amdgpu_fence_wait_empty(ring);
809 amdgpu_fence_wait_empty(ring); 804 }
810 }
811 mutex_unlock(&adev->ring_lock);
812 805
813 amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE, NULL, NULL); 806 amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE, NULL, NULL);
814 } else { 807 } else {