diff options
author | Evan Quan <evan.quan@amd.com> | 2019-04-17 22:38:51 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-05-24 13:20:47 -0400 |
commit | 437ccd175a7a3c9871536a26b2d28e3c99515e7f (patch) | |
tree | 6a38a9c18930c19b1c737c10e6b92f5463c34752 /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |
parent | a188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff) |
drm/amd/powerplay: support hotspot/memory critical limit values
These new interfaces(temp2_crit, temp2_crit_hyst, temp3_crit,
temp3_crit_hyst) are supported on SOC15 dGPUs only.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 55 |
1 files changed, 53 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index 34471dbaa872..1f78deadb770 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |||
@@ -1414,6 +1414,38 @@ static ssize_t amdgpu_hwmon_show_temp_thresh(struct device *dev, | |||
1414 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); | 1414 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); |
1415 | } | 1415 | } |
1416 | 1416 | ||
1417 | static ssize_t amdgpu_hwmon_show_hotspot_temp_thresh(struct device *dev, | ||
1418 | struct device_attribute *attr, | ||
1419 | char *buf) | ||
1420 | { | ||
1421 | struct amdgpu_device *adev = dev_get_drvdata(dev); | ||
1422 | int hyst = to_sensor_dev_attr(attr)->index; | ||
1423 | int temp; | ||
1424 | |||
1425 | if (hyst) | ||
1426 | temp = adev->pm.dpm.thermal.min_hotspot_temp; | ||
1427 | else | ||
1428 | temp = adev->pm.dpm.thermal.max_hotspot_crit_temp; | ||
1429 | |||
1430 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); | ||
1431 | } | ||
1432 | |||
1433 | static ssize_t amdgpu_hwmon_show_mem_temp_thresh(struct device *dev, | ||
1434 | struct device_attribute *attr, | ||
1435 | char *buf) | ||
1436 | { | ||
1437 | struct amdgpu_device *adev = dev_get_drvdata(dev); | ||
1438 | int hyst = to_sensor_dev_attr(attr)->index; | ||
1439 | int temp; | ||
1440 | |||
1441 | if (hyst) | ||
1442 | temp = adev->pm.dpm.thermal.min_mem_temp; | ||
1443 | else | ||
1444 | temp = adev->pm.dpm.thermal.max_mem_crit_temp; | ||
1445 | |||
1446 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); | ||
1447 | } | ||
1448 | |||
1417 | static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev, | 1449 | static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev, |
1418 | struct device_attribute *attr, | 1450 | struct device_attribute *attr, |
1419 | char *buf) | 1451 | char *buf) |
@@ -1985,9 +2017,11 @@ static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, | |||
1985 | * | 2017 | * |
1986 | * - temp1_input: the on die GPU temperature in millidegrees Celsius | 2018 | * - temp1_input: the on die GPU temperature in millidegrees Celsius |
1987 | * | 2019 | * |
1988 | * - temp1_crit: temperature critical max value in millidegrees Celsius | 2020 | * - temp[1-3]_crit: temperature critical max value in millidegrees Celsius |
2021 | * - temp2_crit and temp3_crit are supported on SOC15 dGPUs only | ||
1989 | * | 2022 | * |
1990 | * - temp1_crit_hyst: temperature hysteresis for critical limit in millidegrees Celsius | 2023 | * - temp[1-3]_crit_hyst: temperature hysteresis for critical limit in millidegrees Celsius |
2024 | * - temp2_crit_hyst and temp3_crit_hyst are supported on SOC15 dGPUs only | ||
1991 | * | 2025 | * |
1992 | * hwmon interfaces for GPU voltage: | 2026 | * hwmon interfaces for GPU voltage: |
1993 | * | 2027 | * |
@@ -2038,6 +2072,10 @@ static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, | |||
2038 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, amdgpu_hwmon_show_temp, NULL, 0); | 2072 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, amdgpu_hwmon_show_temp, NULL, 0); |
2039 | static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 0); | 2073 | static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 0); |
2040 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 1); | 2074 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 1); |
2075 | static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, amdgpu_hwmon_show_hotspot_temp_thresh, NULL, 0); | ||
2076 | static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, amdgpu_hwmon_show_hotspot_temp_thresh, NULL, 1); | ||
2077 | static SENSOR_DEVICE_ATTR(temp3_crit, S_IRUGO, amdgpu_hwmon_show_mem_temp_thresh, NULL, 0); | ||
2078 | static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, amdgpu_hwmon_show_mem_temp_thresh, NULL, 1); | ||
2041 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1, amdgpu_hwmon_set_pwm1, 0); | 2079 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1, amdgpu_hwmon_set_pwm1, 0); |
2042 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1_enable, amdgpu_hwmon_set_pwm1_enable, 0); | 2080 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1_enable, amdgpu_hwmon_set_pwm1_enable, 0); |
2043 | static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, amdgpu_hwmon_get_pwm1_min, NULL, 0); | 2081 | static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, amdgpu_hwmon_get_pwm1_min, NULL, 0); |
@@ -2064,6 +2102,10 @@ static struct attribute *hwmon_attributes[] = { | |||
2064 | &sensor_dev_attr_temp1_input.dev_attr.attr, | 2102 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
2065 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | 2103 | &sensor_dev_attr_temp1_crit.dev_attr.attr, |
2066 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | 2104 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, |
2105 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | ||
2106 | &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, | ||
2107 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | ||
2108 | &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, | ||
2067 | &sensor_dev_attr_pwm1.dev_attr.attr, | 2109 | &sensor_dev_attr_pwm1.dev_attr.attr, |
2068 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | 2110 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
2069 | &sensor_dev_attr_pwm1_min.dev_attr.attr, | 2111 | &sensor_dev_attr_pwm1_min.dev_attr.attr, |
@@ -2186,6 +2228,15 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, | |||
2186 | attr == &sensor_dev_attr_freq2_label.dev_attr.attr)) | 2228 | attr == &sensor_dev_attr_freq2_label.dev_attr.attr)) |
2187 | return 0; | 2229 | return 0; |
2188 | 2230 | ||
2231 | /* only SOC15 dGPUs support hotspot and mem temperatures */ | ||
2232 | if (((adev->flags & AMD_IS_APU) || | ||
2233 | adev->asic_type < CHIP_VEGA10) && | ||
2234 | (attr == &sensor_dev_attr_temp2_crit.dev_attr.attr || | ||
2235 | attr == &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr || | ||
2236 | attr == &sensor_dev_attr_temp3_crit.dev_attr.attr || | ||
2237 | attr == &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr)) | ||
2238 | return 0; | ||
2239 | |||
2189 | return effective_mode; | 2240 | return effective_mode; |
2190 | } | 2241 | } |
2191 | 2242 | ||