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authorTom St Denis <tom.stdenis@amd.com>2016-09-19 12:48:52 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-09-22 10:24:16 -0400
commit3de4ec57271a1979b5d960d8610939fff7dc38f9 (patch)
treefbed9494ace8145c1f1f5477f954fb67e6311697 /drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
parent884031f0aacf57dad1575f96714efc80de9b19cc (diff)
drm/amd/powerplay: Replace per-asic print_performance with generic
Replace per-asic print_current_performance() functions with generic that calls read_sensor. Tested on Tonga and Carrizo for aesthetics and accuracy. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c62
1 files changed, 60 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index d4ec3cb187a5..accc908bdc88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1322,6 +1322,64 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
1322 */ 1322 */
1323#if defined(CONFIG_DEBUG_FS) 1323#if defined(CONFIG_DEBUG_FS)
1324 1324
1325static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *adev)
1326{
1327 int32_t value;
1328
1329 /* sanity check PP is enabled */
1330 if (!(adev->powerplay.pp_funcs &&
1331 adev->powerplay.pp_funcs->read_sensor))
1332 return -EINVAL;
1333
1334 /* GPU Clocks */
1335 seq_printf(m, "GFX Clocks and Power:\n");
1336 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, &value))
1337 seq_printf(m, "\t%u MHz (MCLK)\n", value/100);
1338 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, &value))
1339 seq_printf(m, "\t%u MHz (SCLK)\n", value/100);
1340 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, &value))
1341 seq_printf(m, "\t%u mV (VDDGFX)\n", value);
1342 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, &value))
1343 seq_printf(m, "\t%u mV (VDDNB)\n", value);
1344 seq_printf(m, "\n");
1345
1346 /* GPU Temp */
1347 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, &value))
1348 seq_printf(m, "GPU Temperature: %u C\n", value/1000);
1349
1350 /* GPU Load */
1351 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, &value))
1352 seq_printf(m, "GPU Load: %u %%\n", value);
1353 seq_printf(m, "\n");
1354
1355 /* UVD clocks */
1356 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, &value)) {
1357 if (!value) {
1358 seq_printf(m, "UVD: Disabled\n");
1359 } else {
1360 seq_printf(m, "UVD: Enabled\n");
1361 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, &value))
1362 seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
1363 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, &value))
1364 seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
1365 }
1366 }
1367 seq_printf(m, "\n");
1368
1369 /* VCE clocks */
1370 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, &value)) {
1371 if (!value) {
1372 seq_printf(m, "VCE: Disabled\n");
1373 } else {
1374 seq_printf(m, "VCE: Enabled\n");
1375 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, &value))
1376 seq_printf(m, "\t%u MHz (ECCLK)\n", value/100);
1377 }
1378 }
1379
1380 return 0;
1381}
1382
1325static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data) 1383static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
1326{ 1384{
1327 struct drm_info_node *node = (struct drm_info_node *) m->private; 1385 struct drm_info_node *node = (struct drm_info_node *) m->private;
@@ -1337,11 +1395,11 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
1337 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { 1395 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) {
1338 seq_printf(m, "PX asic powered off\n"); 1396 seq_printf(m, "PX asic powered off\n");
1339 } else if (adev->pp_enabled) { 1397 } else if (adev->pp_enabled) {
1340 amdgpu_dpm_debugfs_print_current_performance_level(adev, m); 1398 return amdgpu_debugfs_pm_info_pp(m, adev);
1341 } else { 1399 } else {
1342 mutex_lock(&adev->pm.mutex); 1400 mutex_lock(&adev->pm.mutex);
1343 if (adev->pm.funcs->debugfs_print_current_performance_level) 1401 if (adev->pm.funcs->debugfs_print_current_performance_level)
1344 amdgpu_dpm_debugfs_print_current_performance_level(adev, m); 1402 adev->pm.funcs->debugfs_print_current_performance_level(adev, m);
1345 else 1403 else
1346 seq_printf(m, "Debugfs support not implemented for this asic\n"); 1404 seq_printf(m, "Debugfs support not implemented for this asic\n");
1347 mutex_unlock(&adev->pm.mutex); 1405 mutex_unlock(&adev->pm.mutex);