drm/amdgpu: refine vce2.0 dpm sequence

start vce first then enable vce dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 3 insertions, 3 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index da877f3c10fc..b69f8274d81a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1316,11 +1316,11 @@ void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
                         /* XXX select vce level based on ring/task */
                         adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL;
                         mutex_unlock(&adev->pm.mutex);
-                        amdgpu_pm_compute_clocks(adev);
-                        amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                        AMD_PG_STATE_UNGATE);
                         amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
                                                         AMD_CG_STATE_UNGATE);
+                        amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                        AMD_PG_STATE_UNGATE);
+                        amdgpu_pm_compute_clocks(adev);
                 } else {
                         amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
                                                         AMD_PG_STATE_GATE);