diff options
author | Dave Airlie <airlied@redhat.com> | 2018-07-03 20:27:12 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2018-07-03 20:27:12 -0400 |
commit | f29135ee4e0d4e01911ed569f731bfdb841cea6d (patch) | |
tree | e72d49a2f677dd069c3a673522cf785548148f71 /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |
parent | eab976693153b9854bfa83d131374748f6ca4280 (diff) | |
parent | 021c91791a5e7e85c567452f1be3e4c2c6cb6063 (diff) |
Merge v4.18-rc3 into drm-next
Two requests have come in for a backmerge,
and I've got some pull reqs on rc2, so this
just makes sense.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index f5b0b180a6cc..512f59836436 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |||
@@ -918,8 +918,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, | |||
918 | domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); | 918 | domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); |
919 | if (domain == AMDGPU_GEM_DOMAIN_VRAM) { | 919 | if (domain == AMDGPU_GEM_DOMAIN_VRAM) { |
920 | adev->vram_pin_size += amdgpu_bo_size(bo); | 920 | adev->vram_pin_size += amdgpu_bo_size(bo); |
921 | if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) | 921 | adev->invisible_pin_size += amdgpu_vram_mgr_bo_invisible_size(bo); |
922 | adev->invisible_pin_size += amdgpu_bo_size(bo); | ||
923 | } else if (domain == AMDGPU_GEM_DOMAIN_GTT) { | 922 | } else if (domain == AMDGPU_GEM_DOMAIN_GTT) { |
924 | adev->gart_pin_size += amdgpu_bo_size(bo); | 923 | adev->gart_pin_size += amdgpu_bo_size(bo); |
925 | } | 924 | } |
@@ -969,25 +968,22 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo) | |||
969 | bo->pin_count--; | 968 | bo->pin_count--; |
970 | if (bo->pin_count) | 969 | if (bo->pin_count) |
971 | return 0; | 970 | return 0; |
972 | for (i = 0; i < bo->placement.num_placement; i++) { | ||
973 | bo->placements[i].lpfn = 0; | ||
974 | bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT; | ||
975 | } | ||
976 | r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); | ||
977 | if (unlikely(r)) { | ||
978 | dev_err(adev->dev, "%p validate failed for unpin\n", bo); | ||
979 | goto error; | ||
980 | } | ||
981 | 971 | ||
982 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) { | 972 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) { |
983 | adev->vram_pin_size -= amdgpu_bo_size(bo); | 973 | adev->vram_pin_size -= amdgpu_bo_size(bo); |
984 | if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) | 974 | adev->invisible_pin_size -= amdgpu_vram_mgr_bo_invisible_size(bo); |
985 | adev->invisible_pin_size -= amdgpu_bo_size(bo); | ||
986 | } else if (bo->tbo.mem.mem_type == TTM_PL_TT) { | 975 | } else if (bo->tbo.mem.mem_type == TTM_PL_TT) { |
987 | adev->gart_pin_size -= amdgpu_bo_size(bo); | 976 | adev->gart_pin_size -= amdgpu_bo_size(bo); |
988 | } | 977 | } |
989 | 978 | ||
990 | error: | 979 | for (i = 0; i < bo->placement.num_placement; i++) { |
980 | bo->placements[i].lpfn = 0; | ||
981 | bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT; | ||
982 | } | ||
983 | r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); | ||
984 | if (unlikely(r)) | ||
985 | dev_err(adev->dev, "%p validate failed for unpin\n", bo); | ||
986 | |||
991 | return r; | 987 | return r; |
992 | } | 988 | } |
993 | 989 | ||