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authorMichel Dänzer <michel.daenzer@amd.com>2018-07-11 06:00:40 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-07-13 15:46:21 -0400
commita5ccfe5c20740f2fbf00291490cdf8d2373ec255 (patch)
tree66b6a41a586ebba1e8c04a71dfbe3058c42b9581 /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
parentddc21af4d0f37f42b33c54cb69b215997fe5b082 (diff)
drm/amdgpu: Make pin_size values atomic
Concurrent execution of the non-atomic arithmetic could result in completely bogus values. v2: * Rebased on v2 of the previous patch Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/106872 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index f0239feceab4..1fd83ed175fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -916,10 +916,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
916 916
917 domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); 917 domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
918 if (domain == AMDGPU_GEM_DOMAIN_VRAM) { 918 if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
919 adev->vram_pin_size += amdgpu_bo_size(bo); 919 atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
920 adev->visible_pin_size += amdgpu_vram_mgr_bo_visible_size(bo); 920 atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
921 &adev->visible_pin_size);
921 } else if (domain == AMDGPU_GEM_DOMAIN_GTT) { 922 } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
922 adev->gart_pin_size += amdgpu_bo_size(bo); 923 atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
923 } 924 }
924 925
925error: 926error:
@@ -968,10 +969,11 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
968 return 0; 969 return 0;
969 970
970 if (bo->tbo.mem.mem_type == TTM_PL_VRAM) { 971 if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
971 adev->vram_pin_size -= amdgpu_bo_size(bo); 972 atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
972 adev->visible_pin_size -= amdgpu_vram_mgr_bo_visible_size(bo); 973 atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
974 &adev->visible_pin_size);
973 } else if (bo->tbo.mem.mem_type == TTM_PL_TT) { 975 } else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
974 adev->gart_pin_size -= amdgpu_bo_size(bo); 976 atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
975 } 977 }
976 978
977 for (i = 0; i < bo->placement.num_placement; i++) { 979 for (i = 0; i < bo->placement.num_placement; i++) {