diff options
author | Michel Dänzer <michel.daenzer@amd.com> | 2018-06-12 06:07:33 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-06-19 14:51:22 -0400 |
commit | 5e9244ff585239630f15f8ad8e676bc91a94ca9e (patch) | |
tree | 09c68e9128f2e0f221cf4105d75427e32772b9a6 /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |
parent | 34d6d59986abb1d2cb5415a49b6c50f51ba1d2e4 (diff) |
drm/amdgpu: Refactor amdgpu_vram_mgr_bo_invisible_size helper
Preparation for the following fix, no functional change intended.
Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 026140f08ee9..3526efa8960e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |||
@@ -762,8 +762,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, | |||
762 | domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); | 762 | domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); |
763 | if (domain == AMDGPU_GEM_DOMAIN_VRAM) { | 763 | if (domain == AMDGPU_GEM_DOMAIN_VRAM) { |
764 | adev->vram_pin_size += amdgpu_bo_size(bo); | 764 | adev->vram_pin_size += amdgpu_bo_size(bo); |
765 | if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) | 765 | adev->invisible_pin_size += amdgpu_vram_mgr_bo_invisible_size(bo); |
766 | adev->invisible_pin_size += amdgpu_bo_size(bo); | ||
767 | } else if (domain == AMDGPU_GEM_DOMAIN_GTT) { | 766 | } else if (domain == AMDGPU_GEM_DOMAIN_GTT) { |
768 | adev->gart_pin_size += amdgpu_bo_size(bo); | 767 | adev->gart_pin_size += amdgpu_bo_size(bo); |
769 | } | 768 | } |
@@ -793,8 +792,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo) | |||
793 | 792 | ||
794 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) { | 793 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) { |
795 | adev->vram_pin_size -= amdgpu_bo_size(bo); | 794 | adev->vram_pin_size -= amdgpu_bo_size(bo); |
796 | if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) | 795 | adev->invisible_pin_size -= amdgpu_vram_mgr_bo_invisible_size(bo); |
797 | adev->invisible_pin_size -= amdgpu_bo_size(bo); | ||
798 | } else if (bo->tbo.mem.mem_type == TTM_PL_TT) { | 796 | } else if (bo->tbo.mem.mem_type == TTM_PL_TT) { |
799 | adev->gart_pin_size -= amdgpu_bo_size(bo); | 797 | adev->gart_pin_size -= amdgpu_bo_size(bo); |
800 | } | 798 | } |