Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next

Last set of features for 4.15.  Highlights:
- Add a bo flag to allow buffers to opt out of implicit sync
- Add ctx priority setting interface
- Lots more powerplay cleanups
- Start to plumb through vram lost infrastructure for gpu reset
- ttm support for huge pages
- misc cleanups and bug fixes

* 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits)
  drm/amd/powerplay: Place the constant on the right side of the test
  drm/amd/powerplay: Remove useless variable
  drm/amd/powerplay: Don't cast kzalloc() return value
  drm/amdgpu: allow GTT overcommit during bind
  drm/amdgpu: linear validate first then bind to GART
  drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.
  drm/amd/pp: thermal control not enabled on vega10.
  drm/amdgpu: busywait KIQ register accessing (v4)
  drm/amdgpu: report more amdgpu_fence_info
  drm/amdgpu:don't check soft_reset for sriov
  drm/amdgpu:fix duplicated setting job's vram_lost
  drm/amdgpu:reduce wb to 512 slot
  drm/amdgpu: fix regresstion on SR-IOV gpu reset failed
  drm/amd/powerplay: Tidy up cz_dpm_powerup_vce()
  drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce()
  drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()
  drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm()
  drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd()
  drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd()
  drm/amd/powerplay: Tidy up cz_start_dpm()
  ...

1 files changed, 12 insertions, 6 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 4510627ae83e..0cfc68db575b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -65,6 +65,7 @@ int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
         amdgpu_sync_create(&(*job)->sync);
         amdgpu_sync_create(&(*job)->dep_sync);
         amdgpu_sync_create(&(*job)->sched_sync);
+        (*job)->vram_lost_counter = atomic_read(&adev->vram_lost_counter);
 
         return 0;
 }
@@ -103,6 +104,7 @@ static void amdgpu_job_free_cb(struct amd_sched_job *s_job)
 {
         struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);
 
+        amdgpu_ring_priority_put(job->ring, amd_sched_get_job_priority(s_job));
         dma_fence_put(job->fence);
         amdgpu_sync_free(&job->sync);
         amdgpu_sync_free(&job->dep_sync);
@@ -139,6 +141,8 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
         job->fence_ctx = entity->fence_context;
         *f = dma_fence_get(&job->base.s_fence->finished);
         amdgpu_job_free_resources(job);
+        amdgpu_ring_priority_get(job->ring,
+                                 amd_sched_get_job_priority(&job->base));
         amd_sched_entity_push_job(&job->base);
 
         return 0;
@@ -177,8 +181,8 @@ static struct dma_fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
 static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)
 {
         struct dma_fence *fence = NULL;
+        struct amdgpu_device *adev;
         struct amdgpu_job *job;
-        struct amdgpu_fpriv *fpriv = NULL;
         int r;
 
         if (!sched_job) {
@@ -186,23 +190,25 @@ static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)
                 return NULL;
         }
         job = to_amdgpu_job(sched_job);
+        adev = job->adev;
 
         BUG_ON(amdgpu_sync_peek_fence(&job->sync, NULL));
 
         trace_amdgpu_sched_run_job(job);
-        if (job->vm)
-                fpriv = container_of(job->vm, struct amdgpu_fpriv, vm);
         /* skip ib schedule when vram is lost */
-        if (fpriv && amdgpu_kms_vram_lost(job->adev, fpriv))
+        if (job->vram_lost_counter != atomic_read(&adev->vram_lost_counter)) {
+                dma_fence_set_error(&job->base.s_fence->finished, -ECANCELED);
                 DRM_ERROR("Skip scheduling IBs!\n");
-        else {
-                r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job, &fence);
+        } else {
+                r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
+                                       &fence);
                 if (r)
                         DRM_ERROR("Error scheduling IBs (%d)\n", r);
         }
         /* if gpu reset, hw fence will be replaced here */
         dma_fence_put(job->fence);
         job->fence = dma_fence_get(fence);
+
         amdgpu_job_free_resources(job);
         return fence;
 }