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authorFelix Kuehling <Felix.Kuehling@amd.com>2017-08-26 02:43:06 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 14:53:20 -0400
commita2f14820e3493145c25095873d4a510a1b25efdc (patch)
tree801651223be96004fc4f39ef658c3bd282311ca2 /drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
parent5d86b2c391965cbcb295e8fa795276977b2a416e (diff)
drm/amdgpu: Track pending retry faults in IH and VM (v2)
IH tracks pending retry faults in a hash table for fast lookup in interrupt context. Each VM has a short FIFO of pending VM faults for processing in a bottom half. The IH prescreening stage adds retry faults and filters out repeated retry interrupts to minimize the impact of interrupt storms. It's the VM's responsibility remove pending faults once they are handled. For now this is only done when the VM is destroyed. v2: - Made the hash table smaller and the FIFO longer. I never want the FIFO to fill up, because that would make prescreen take longer. 128 pending page faults should be enough to keep migrations busy. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 3de8e74e5b3a..ada89358e220 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -24,6 +24,8 @@
24#ifndef __AMDGPU_IH_H__ 24#ifndef __AMDGPU_IH_H__
25#define __AMDGPU_IH_H__ 25#define __AMDGPU_IH_H__
26 26
27#include <linux/chash.h>
28
27struct amdgpu_device; 29struct amdgpu_device;
28 /* 30 /*
29 * vega10+ IH clients 31 * vega10+ IH clients
@@ -69,6 +71,13 @@ enum amdgpu_ih_clientid
69 71
70#define AMDGPU_IH_CLIENTID_LEGACY 0 72#define AMDGPU_IH_CLIENTID_LEGACY 0
71 73
74#define AMDGPU_PAGEFAULT_HASH_BITS 8
75struct amdgpu_retryfault_hashtable {
76 DECLARE_CHASH_TABLE(hash, AMDGPU_PAGEFAULT_HASH_BITS, 8, 0);
77 spinlock_t lock;
78 int count;
79};
80
72/* 81/*
73 * R6xx+ IH ring 82 * R6xx+ IH ring
74 */ 83 */
@@ -87,6 +96,7 @@ struct amdgpu_ih_ring {
87 bool use_doorbell; 96 bool use_doorbell;
88 bool use_bus_addr; 97 bool use_bus_addr;
89 dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */ 98 dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */
99 struct amdgpu_retryfault_hashtable *faults;
90}; 100};
91 101
92#define AMDGPU_IH_SRC_DATA_MAX_SIZE_DW 4 102#define AMDGPU_IH_SRC_DATA_MAX_SIZE_DW 4
@@ -109,5 +119,7 @@ int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size,
109 bool use_bus_addr); 119 bool use_bus_addr);
110void amdgpu_ih_ring_fini(struct amdgpu_device *adev); 120void amdgpu_ih_ring_fini(struct amdgpu_device *adev);
111int amdgpu_ih_process(struct amdgpu_device *adev); 121int amdgpu_ih_process(struct amdgpu_device *adev);
122int amdgpu_ih_add_fault(struct amdgpu_device *adev, u64 key);
123void amdgpu_ih_clear_fault(struct amdgpu_device *adev, u64 key);
112 124
113#endif 125#endif