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authorDave Airlie <airlied@redhat.com>2018-09-27 19:48:35 -0400
committerDave Airlie <airlied@redhat.com>2018-09-27 19:48:40 -0400
commit87c2ee740c07f1edae9eec8bc45cb9b32a68f323 (patch)
tree1515f53eacb86689f2f96279e51cf0053ae8a308 /drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
parent2de0b0a158bf423208c3898522c8fa1c1078df48 (diff)
parent6a96243056217662843694a4cbc83158d0e84403 (diff)
Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux into drm-next
More new features and fixes for 4.20: - Add dynamic powergating support for VCN on picasso - Scheduler cleanup - Vega20 support for KFD - DC cleanups and bug fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180927184348.2696-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h32
1 files changed, 7 insertions, 25 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 0d5b3f5201d2..9ce8c93ec19b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -24,12 +24,8 @@
24#ifndef __AMDGPU_IH_H__ 24#ifndef __AMDGPU_IH_H__
25#define __AMDGPU_IH_H__ 25#define __AMDGPU_IH_H__
26 26
27#include "soc15_ih_clientid.h"
28
29struct amdgpu_device; 27struct amdgpu_device;
30 28struct amdgpu_iv_entry;
31#define AMDGPU_IH_CLIENTID_LEGACY 0
32#define AMDGPU_IH_CLIENTID_MAX SOC15_IH_CLIENTID_MAX
33 29
34/* 30/*
35 * R6xx+ IH ring 31 * R6xx+ IH ring
@@ -51,22 +47,6 @@ struct amdgpu_ih_ring {
51 dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */ 47 dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */
52}; 48};
53 49
54#define AMDGPU_IH_SRC_DATA_MAX_SIZE_DW 4
55
56struct amdgpu_iv_entry {
57 unsigned client_id;
58 unsigned src_id;
59 unsigned ring_id;
60 unsigned vmid;
61 unsigned vmid_src;
62 uint64_t timestamp;
63 unsigned timestamp_src;
64 unsigned pasid;
65 unsigned pasid_src;
66 unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW];
67 const uint32_t *iv_entry;
68};
69
70/* provided by the ih block */ 50/* provided by the ih block */
71struct amdgpu_ih_funcs { 51struct amdgpu_ih_funcs {
72 /* ring read/write ptr handling, called from interrupt context */ 52 /* ring read/write ptr handling, called from interrupt context */
@@ -82,9 +62,11 @@ struct amdgpu_ih_funcs {
82#define amdgpu_ih_decode_iv(adev, iv) (adev)->irq.ih_funcs->decode_iv((adev), (iv)) 62#define amdgpu_ih_decode_iv(adev, iv) (adev)->irq.ih_funcs->decode_iv((adev), (iv))
83#define amdgpu_ih_set_rptr(adev) (adev)->irq.ih_funcs->set_rptr((adev)) 63#define amdgpu_ih_set_rptr(adev) (adev)->irq.ih_funcs->set_rptr((adev))
84 64
85int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size, 65int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
86 bool use_bus_addr); 66 unsigned ring_size, bool use_bus_addr);
87void amdgpu_ih_ring_fini(struct amdgpu_device *adev); 67void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
88int amdgpu_ih_process(struct amdgpu_device *adev); 68int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
69 void (*callback)(struct amdgpu_device *adev,
70 struct amdgpu_ih_ring *ih));
89 71
90#endif 72#endif