drm/amdgpu: add clinetid definition for vega10

Signed-off-by: ken <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 40 insertions, 2 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 584136e579a3..043620dfdacb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -25,10 +25,48 @@
 #define __AMDGPU_IH_H__
 
 struct amdgpu_device;
+ /*
+  * vega10+ IH clients
+ */
+enum amdgpu_ih_clientid
+{
+    AMDGPU_IH_CLIENTID_IH           = 0x00,
+    AMDGPU_IH_CLIENTID_ACP          = 0x01,
+    AMDGPU_IH_CLIENTID_ATHUB        = 0x02,
+    AMDGPU_IH_CLIENTID_BIF          = 0x03,
+    AMDGPU_IH_CLIENTID_DCE          = 0x04,
+    AMDGPU_IH_CLIENTID_ISP          = 0x05,
+    AMDGPU_IH_CLIENTID_PCIE0        = 0x06,
+    AMDGPU_IH_CLIENTID_RLC          = 0x07,
+    AMDGPU_IH_CLIENTID_SDMA0        = 0x08,
+    AMDGPU_IH_CLIENTID_SDMA1        = 0x09,
+    AMDGPU_IH_CLIENTID_SE0SH        = 0x0a,
+    AMDGPU_IH_CLIENTID_SE1SH        = 0x0b,
+    AMDGPU_IH_CLIENTID_SE2SH        = 0x0c,
+    AMDGPU_IH_CLIENTID_SE3SH        = 0x0d,
+    AMDGPU_IH_CLIENTID_SYSHUB       = 0x0e,
+    AMDGPU_IH_CLIENTID_THM          = 0x0f,
+    AMDGPU_IH_CLIENTID_UVD          = 0x10,
+    AMDGPU_IH_CLIENTID_VCE0         = 0x11,
+    AMDGPU_IH_CLIENTID_VMC          = 0x12,
+    AMDGPU_IH_CLIENTID_XDMA         = 0x13,
+    AMDGPU_IH_CLIENTID_GRBM_CP      = 0x14,
+    AMDGPU_IH_CLIENTID_ATS          = 0x15,
+    AMDGPU_IH_CLIENTID_ROM_SMUIO    = 0x16,
+    AMDGPU_IH_CLIENTID_DF           = 0x17,
+    AMDGPU_IH_CLIENTID_VCE1         = 0x18,
+    AMDGPU_IH_CLIENTID_PWR          = 0x19,
+    AMDGPU_IH_CLIENTID_UTCL2        = 0x1b,
+    AMDGPU_IH_CLIENTID_EA           = 0x1c,
+    AMDGPU_IH_CLIENTID_UTCL2LOG     = 0x1d,
+    AMDGPU_IH_CLIENTID_MP0          = 0x1e,
+    AMDGPU_IH_CLIENTID_MP1          = 0x1f,
 
-#define AMDGPU_IH_CLIENTID_LEGACY 0
+    AMDGPU_IH_CLIENTID_MAX
 
-#define AMDGPU_IH_CLIENTID_MAX 0x1f
+};
+
+#define AMDGPU_IH_CLIENTID_LEGACY 0
 
 /*
  * R6xx+ IH ring