diff options
author | Dave Airlie <airlied@redhat.com> | 2018-11-18 20:07:52 -0500 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-11-18 20:07:52 -0500 |
commit | 9235dd441af43599b9cdcce599a3da4083fcad3c (patch) | |
tree | 5f8a79cc2d378f05e807c6c5e388394b8e86319d /drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | |
parent | d7563c55ef9fc1fd2301b8708b3c1f53509d6745 (diff) | |
parent | 36b486bc682114a2f1001cbf1a87f21ae381bfc1 (diff) |
Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm-next
New features for 4.21:
amdgpu:
- Support for SDMA paging queue on vega
- Put compute EOP buffers into vram for better performance
- Share more code with amdkfd
- Support for scanout with DCC on gfx9
- Initial kerneldoc for DC
- Updated SMU firmware support for gfx8 chips
- Rework CSA handling for eventual support for preemption
- XGMI PSP support
- Clean up RLC handling
- Enable GPU reset by default on VI, SOC15 dGPUs
- Ring and IB test cleanups
amdkfd:
- Share more code with amdgpu
ttm:
- Move global init out of the drivers
scheduler:
- Track if schedulers are ready for work
- Timeout/fault handling changes to facilitate GPU recovery
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181114165113.3751-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 49 |
1 files changed, 23 insertions, 26 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index b8963b725dfa..c48207b377bc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | |||
@@ -146,7 +146,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | |||
146 | fence_ctx = 0; | 146 | fence_ctx = 0; |
147 | } | 147 | } |
148 | 148 | ||
149 | if (!ring->ready) { | 149 | if (!ring->sched.ready) { |
150 | dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); | 150 | dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); |
151 | return -EINVAL; | 151 | return -EINVAL; |
152 | } | 152 | } |
@@ -221,8 +221,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | |||
221 | !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */ | 221 | !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */ |
222 | continue; | 222 | continue; |
223 | 223 | ||
224 | amdgpu_ring_emit_ib(ring, ib, job ? job->vmid : 0, | 224 | amdgpu_ring_emit_ib(ring, job, ib, need_ctx_switch); |
225 | need_ctx_switch); | ||
226 | need_ctx_switch = false; | 225 | need_ctx_switch = false; |
227 | } | 226 | } |
228 | 227 | ||
@@ -347,19 +346,14 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev) | |||
347 | tmo_gfx = 8 * AMDGPU_IB_TEST_TIMEOUT; | 346 | tmo_gfx = 8 * AMDGPU_IB_TEST_TIMEOUT; |
348 | } | 347 | } |
349 | 348 | ||
350 | for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { | 349 | for (i = 0; i < adev->num_rings; ++i) { |
351 | struct amdgpu_ring *ring = adev->rings[i]; | 350 | struct amdgpu_ring *ring = adev->rings[i]; |
352 | long tmo; | 351 | long tmo; |
353 | 352 | ||
354 | if (!ring || !ring->ready) | 353 | /* KIQ rings don't have an IB test because we never submit IBs |
355 | continue; | 354 | * to them and they have no interrupt support. |
356 | |||
357 | /* skip IB tests for KIQ in general for the below reasons: | ||
358 | * 1. We never submit IBs to the KIQ | ||
359 | * 2. KIQ doesn't use the EOP interrupts, | ||
360 | * we use some other CP interrupt. | ||
361 | */ | 355 | */ |
362 | if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ) | 356 | if (!ring->sched.ready || !ring->funcs->test_ib) |
363 | continue; | 357 | continue; |
364 | 358 | ||
365 | /* MM engine need more time */ | 359 | /* MM engine need more time */ |
@@ -374,20 +368,23 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev) | |||
374 | tmo = tmo_gfx; | 368 | tmo = tmo_gfx; |
375 | 369 | ||
376 | r = amdgpu_ring_test_ib(ring, tmo); | 370 | r = amdgpu_ring_test_ib(ring, tmo); |
377 | if (r) { | 371 | if (!r) { |
378 | ring->ready = false; | 372 | DRM_DEV_DEBUG(adev->dev, "ib test on %s succeeded\n", |
379 | 373 | ring->name); | |
380 | if (ring == &adev->gfx.gfx_ring[0]) { | 374 | continue; |
381 | /* oh, oh, that's really bad */ | 375 | } |
382 | DRM_ERROR("amdgpu: failed testing IB on GFX ring (%d).\n", r); | 376 | |
383 | adev->accel_working = false; | 377 | ring->sched.ready = false; |
384 | return r; | 378 | DRM_DEV_ERROR(adev->dev, "IB test failed on %s (%d).\n", |
385 | 379 | ring->name, r); | |
386 | } else { | 380 | |
387 | /* still not good, but we can live with it */ | 381 | if (ring == &adev->gfx.gfx_ring[0]) { |
388 | DRM_ERROR("amdgpu: failed testing IB on ring %d (%d).\n", i, r); | 382 | /* oh, oh, that's really bad */ |
389 | ret = r; | 383 | adev->accel_working = false; |
390 | } | 384 | return r; |
385 | |||
386 | } else { | ||
387 | ret = r; | ||
391 | } | 388 | } |
392 | } | 389 | } |
393 | return ret; | 390 | return ret; |