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authorOlof Johansson <olof@lixom.net>2016-06-19 01:59:07 -0400
committerOlof Johansson <olof@lixom.net>2016-06-19 01:59:07 -0400
commit8fd0976702f05042c776848819e5fd2a835f23c9 (patch)
tree8a87b0e33bf39adcc53b3ee4be61155dab86417b /drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
parent58935f24a996cb55595c29dd5303bd9b778c8b00 (diff)
parent8f50b8e57442d28e41bb736c173d8a2490549a82 (diff)
Merge tag 'gpmc-omap-fixes-for-v4.7' of https://github.com/rogerq/linux into fixes
OMAP-GPMC: Fixes for for v4.7-rc cycle: - Fix omap gpmc EXTRADELAY timing. The DT provided timings were wrongly used causing devices requiring extra delay timing to fail. * tag 'gpmc-omap-fixes-for-v4.7' of https://github.com/rogerq/linux: memory: omap-gpmc: Fix omap gpmc EXTRADELAY timing + Linux 4.7-rc3 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 34e35423b78e..7a0b1e50f293 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -122,6 +122,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
122 bool skip_preamble, need_ctx_switch; 122 bool skip_preamble, need_ctx_switch;
123 unsigned patch_offset = ~0; 123 unsigned patch_offset = ~0;
124 struct amdgpu_vm *vm; 124 struct amdgpu_vm *vm;
125 int vmid = 0, old_vmid = ring->vmid;
125 struct fence *hwf; 126 struct fence *hwf;
126 uint64_t ctx; 127 uint64_t ctx;
127 128
@@ -135,9 +136,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
135 if (job) { 136 if (job) {
136 vm = job->vm; 137 vm = job->vm;
137 ctx = job->ctx; 138 ctx = job->ctx;
139 vmid = job->vm_id;
138 } else { 140 } else {
139 vm = NULL; 141 vm = NULL;
140 ctx = 0; 142 ctx = 0;
143 vmid = 0;
141 } 144 }
142 145
143 if (!ring->ready) { 146 if (!ring->ready) {
@@ -163,7 +166,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
163 r = amdgpu_vm_flush(ring, job->vm_id, job->vm_pd_addr, 166 r = amdgpu_vm_flush(ring, job->vm_id, job->vm_pd_addr,
164 job->gds_base, job->gds_size, 167 job->gds_base, job->gds_size,
165 job->gws_base, job->gws_size, 168 job->gws_base, job->gws_size,
166 job->oa_base, job->oa_size); 169 job->oa_base, job->oa_size,
170 (ring->current_ctx == ctx) && (old_vmid != vmid));
167 if (r) { 171 if (r) {
168 amdgpu_ring_undo(ring); 172 amdgpu_ring_undo(ring);
169 return r; 173 return r;
@@ -180,7 +184,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
180 need_ctx_switch = ring->current_ctx != ctx; 184 need_ctx_switch = ring->current_ctx != ctx;
181 for (i = 0; i < num_ibs; ++i) { 185 for (i = 0; i < num_ibs; ++i) {
182 ib = &ibs[i]; 186 ib = &ibs[i];
183
184 /* drop preamble IBs if we don't have a context switch */ 187 /* drop preamble IBs if we don't have a context switch */
185 if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble) 188 if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble)
186 continue; 189 continue;
@@ -188,6 +191,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
188 amdgpu_ring_emit_ib(ring, ib, job ? job->vm_id : 0, 191 amdgpu_ring_emit_ib(ring, ib, job ? job->vm_id : 0,
189 need_ctx_switch); 192 need_ctx_switch);
190 need_ctx_switch = false; 193 need_ctx_switch = false;
194 ring->vmid = vmid;
191 } 195 }
192 196
193 if (ring->funcs->emit_hdp_invalidate) 197 if (ring->funcs->emit_hdp_invalidate)
@@ -198,6 +202,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
198 dev_err(adev->dev, "failed to emit fence (%d)\n", r); 202 dev_err(adev->dev, "failed to emit fence (%d)\n", r);
199 if (job && job->vm_id) 203 if (job && job->vm_id)
200 amdgpu_vm_reset_id(adev, job->vm_id); 204 amdgpu_vm_reset_id(adev, job->vm_id);
205 ring->vmid = old_vmid;
201 amdgpu_ring_undo(ring); 206 amdgpu_ring_undo(ring);
202 return r; 207 return r;
203 } 208 }