drm/amdgpu: separate amdgpu_rlc into a single file

Separate the function and struct of RLC from the file of GFX.
Abstract the function of amdgpu_gfx_rlc_fini.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 1 insertions, 59 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 0a7c285c0454..f790e15bcd08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -29,6 +29,7 @@
  */
 #include "clearstate_defs.h"
 #include "amdgpu_ring.h"
+#include "amdgpu_rlc.h"
 
 /* GFX current status */
 #define AMDGPU_GFX_NORMAL_MODE                  0x00000000L
@@ -37,65 +38,6 @@
 #define AMDGPU_GFX_CG_DISABLED_MODE             0x00000004L
 #define AMDGPU_GFX_LBPW_DISABLED_MODE           0x00000008L
 
-
-struct amdgpu_rlc_funcs {
-        void (*enter_safe_mode)(struct amdgpu_device *adev);
-        void (*exit_safe_mode)(struct amdgpu_device *adev);
-        int  (*init)(struct amdgpu_device *adev);
-        void (*fini)(struct amdgpu_device *adev);
-        int  (*resume)(struct amdgpu_device *adev);
-        void (*stop)(struct amdgpu_device *adev);
-        void (*reset)(struct amdgpu_device *adev);
-        void (*start)(struct amdgpu_device *adev);
-};
-
-struct amdgpu_rlc {
-        /* for power gating */
-        struct amdgpu_bo        *save_restore_obj;
-        uint64_t                save_restore_gpu_addr;
-        volatile uint32_t       *sr_ptr;
-        const u32               *reg_list;
-        u32                     reg_list_size;
-        /* for clear state */
-        struct amdgpu_bo        *clear_state_obj;
-        uint64_t                clear_state_gpu_addr;
-        volatile uint32_t       *cs_ptr;
-        const struct cs_section_def   *cs_data;
-        u32                     clear_state_size;
-        /* for cp tables */
-        struct amdgpu_bo        *cp_table_obj;
-        uint64_t                cp_table_gpu_addr;
-        volatile uint32_t       *cp_table_ptr;
-        u32                     cp_table_size;
-
-        /* safe mode for updating CG/PG state */
-        bool in_safe_mode;
-        const struct amdgpu_rlc_funcs *funcs;
-
-        /* for firmware data */
-        u32 save_and_restore_offset;
-        u32 clear_state_descriptor_offset;
-        u32 avail_scratch_ram_locations;
-        u32 reg_restore_list_size;
-        u32 reg_list_format_start;
-        u32 reg_list_format_separate_start;
-        u32 starting_offsets_start;
-        u32 reg_list_format_size_bytes;
-        u32 reg_list_size_bytes;
-        u32 reg_list_format_direct_reg_list_length;
-        u32 save_restore_list_cntl_size_bytes;
-        u32 save_restore_list_gpm_size_bytes;
-        u32 save_restore_list_srm_size_bytes;
-
-        u32 *register_list_format;
-        u32 *register_restore;
-        u8 *save_restore_list_cntl;
-        u8 *save_restore_list_gpm;
-        u8 *save_restore_list_srm;
-
-        bool is_rlc_v2_1;
-};
-
 #define AMDGPU_MAX_COMPUTE_QUEUES KGD_MAX_QUEUES
 
 struct amdgpu_mec {