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authorLinus Torvalds <torvalds@linux-foundation.org>2018-10-28 20:49:53 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-10-28 20:49:53 -0400
commit53b3b6bbfde6aae8d1ededc86ad4e0e1e00eb5f8 (patch)
treeb29473f21270aefd113b298c9402be8b4b3c91b4 /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
parent746bb4ed6d626f3f9e431a7f9b20504538e62ded (diff)
parentf2bfc71aee75feff33ca659322b72ffeed5a243d (diff)
Merge tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie: "This is going to rebuild more than drm as it adds a new helper to list.h for doing bulk updates. Seemed like a reasonable addition to me. Otherwise the usual merge window stuff lots of i915 and amdgpu, not so much nouveau, and piles of everything else. Core: - Adds a new list.h helper for doing bulk list updates for TTM. - Don't leak fb address in smem_start to userspace (comes with EXPORT workaround for people using mali out of tree hacks) - udmabuf device to turn memfd regions into dma-buf - Per-plane blend mode property - ref/unref replacements with get/put - fbdev conflicting framebuffers code cleaned up - host-endian format variants - panel orientation quirk for Acer One 10 bridge: - TI SN65DSI86 chip support vkms: - GEM support. - Cursor support amdgpu: - Merge amdkfd and amdgpu into one module - CEC over DP AUX support - Picasso APU support + VCN dynamic powergating - Raven2 APU support - Vega20 enablement + kfd support - ACP powergating improvements - ABGR/XBGR display support - VCN jpeg support - xGMI support - DC i2c/aux cleanup - Ycbcr 4:2:0 support - GPUVM improvements - Powerplay and powerplay endian fixes - Display underflow fixes vmwgfx: - Move vmwgfx specific TTM code to vmwgfx - Split out vmwgfx buffer/resource validation code - Atomic operation rework bochs: - use more helpers - format/byteorder improvements qxl: - use more helpers i915: - GGTT coherency getparam - Turn off resource streamer API - More Icelake enablement + DMC firmware - Full PPGTT for Ivybridge, Haswell and Valleyview - DDB distribution based on resolution - Limited range DP display support nouveau: - CEC over DP AUX support - Initial HDMI 2.0 support virtio-gpu: - vmap support for PRIME objects tegra: - Initial Tegra194 support - DMA/IOMMU integration fixes msm: - a6xx perf improvements + clock prefix - GPU preemption optimisations - a6xx devfreq support - cursor support rockchip: - PX30 support - rgb output interface support mediatek: - HDMI output support on mt2701 and mt7623 rcar-du: - Interlaced modes on Gen3 - LVDS on R8A77980 - D3 and E3 SoC support hisilicon: - misc fixes mxsfb: - runtime pm support sun4i: - R40 TCON support - Allwinner A64 support - R40 HDMI support omapdrm: - Driver rework changing display pipeline ordering to use common code - DMM memory barrier and irq fixes - Errata workarounds exynos: - out-bridge support for LVDS bridge driver - Samsung 16x16 tiled format support - Plane alpha and pixel blend mode support tilcdc: - suspend/resume update mali-dp: - misc updates" * tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm: (1382 commits) firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. drm/i915/icl: Fix signal_levels drm/i915/icl: Fix DDI/TC port clk_off bits drm/i915/icl: create function to identify combophy port drm/i915/gen9+: Fix initial readout for Y tiled framebuffers drm/i915: Large page offsets for pread/pwrite drm/i915/selftests: Disable shrinker across mmap-exhaustion drm/i915/dp: Link train Fallback on eDP only if fallback link BW can fit panel's native mode drm/i915: Fix intel_dp_mst_best_encoder() drm/i915: Skip vcpi allocation for MSTB ports that are gone drm/i915: Don't unset intel_connector->mst_port drm/i915: Only reset seqno if actually idle drm/i915: Use the correct crtc when sanitizing plane mapping drm/i915: Restore vblank interrupts earlier drm/i915: Check fb stride against plane max stride drm/amdgpu/vcn:Fix uninitialized symbol error drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003) drm/amd/amdgpu: Fix debugfs error handling drm/amdgpu: Update gc_9_0 golden settings. drm/amd/powerplay: update PPtable with DC BTC and Tvr SocLimit fields ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c22
1 files changed, 8 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 71792d820ae0..7b3d1ebda9df 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -244,16 +244,10 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
244 return -EINVAL; 244 return -EINVAL;
245 } 245 }
246 flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 246 flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
247 if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS) 247 /* GDS allocations must be DW aligned */
248 size = size << AMDGPU_GDS_SHIFT; 248 if (args->in.domains & AMDGPU_GEM_DOMAIN_GDS)
249 else if (args->in.domains == AMDGPU_GEM_DOMAIN_GWS) 249 size = ALIGN(size, 4);
250 size = size << AMDGPU_GWS_SHIFT;
251 else if (args->in.domains == AMDGPU_GEM_DOMAIN_OA)
252 size = size << AMDGPU_OA_SHIFT;
253 else
254 return -EINVAL;
255 } 250 }
256 size = roundup(size, PAGE_SIZE);
257 251
258 if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) { 252 if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {
259 r = amdgpu_bo_reserve(vm->root.base.bo, false); 253 r = amdgpu_bo_reserve(vm->root.base.bo, false);
@@ -572,16 +566,16 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
572 return -EINVAL; 566 return -EINVAL;
573 } 567 }
574 568
575 if (args->va_address >= AMDGPU_VA_HOLE_START && 569 if (args->va_address >= AMDGPU_GMC_HOLE_START &&
576 args->va_address < AMDGPU_VA_HOLE_END) { 570 args->va_address < AMDGPU_GMC_HOLE_END) {
577 dev_dbg(&dev->pdev->dev, 571 dev_dbg(&dev->pdev->dev,
578 "va_address 0x%LX is in VA hole 0x%LX-0x%LX\n", 572 "va_address 0x%LX is in VA hole 0x%LX-0x%LX\n",
579 args->va_address, AMDGPU_VA_HOLE_START, 573 args->va_address, AMDGPU_GMC_HOLE_START,
580 AMDGPU_VA_HOLE_END); 574 AMDGPU_GMC_HOLE_END);
581 return -EINVAL; 575 return -EINVAL;
582 } 576 }
583 577
584 args->va_address &= AMDGPU_VA_HOLE_MASK; 578 args->va_address &= AMDGPU_GMC_HOLE_MASK;
585 579
586 if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) { 580 if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) {
587 dev_dbg(&dev->pdev->dev, "invalid flags combination 0x%08X\n", 581 dev_dbg(&dev->pdev->dev, "invalid flags combination 0x%08X\n",