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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-10-28 20:49:53 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-10-28 20:49:53 -0400 |
| commit | 53b3b6bbfde6aae8d1ededc86ad4e0e1e00eb5f8 (patch) | |
| tree | b29473f21270aefd113b298c9402be8b4b3c91b4 /drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | |
| parent | 746bb4ed6d626f3f9e431a7f9b20504538e62ded (diff) | |
| parent | f2bfc71aee75feff33ca659322b72ffeed5a243d (diff) | |
Merge tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
"This is going to rebuild more than drm as it adds a new helper to
list.h for doing bulk updates. Seemed like a reasonable addition to
me.
Otherwise the usual merge window stuff lots of i915 and amdgpu, not so
much nouveau, and piles of everything else.
Core:
- Adds a new list.h helper for doing bulk list updates for TTM.
- Don't leak fb address in smem_start to userspace (comes with EXPORT
workaround for people using mali out of tree hacks)
- udmabuf device to turn memfd regions into dma-buf
- Per-plane blend mode property
- ref/unref replacements with get/put
- fbdev conflicting framebuffers code cleaned up
- host-endian format variants
- panel orientation quirk for Acer One 10
bridge:
- TI SN65DSI86 chip support
vkms:
- GEM support.
- Cursor support
amdgpu:
- Merge amdkfd and amdgpu into one module
- CEC over DP AUX support
- Picasso APU support + VCN dynamic powergating
- Raven2 APU support
- Vega20 enablement + kfd support
- ACP powergating improvements
- ABGR/XBGR display support
- VCN jpeg support
- xGMI support
- DC i2c/aux cleanup
- Ycbcr 4:2:0 support
- GPUVM improvements
- Powerplay and powerplay endian fixes
- Display underflow fixes
vmwgfx:
- Move vmwgfx specific TTM code to vmwgfx
- Split out vmwgfx buffer/resource validation code
- Atomic operation rework
bochs:
- use more helpers
- format/byteorder improvements
qxl:
- use more helpers
i915:
- GGTT coherency getparam
- Turn off resource streamer API
- More Icelake enablement + DMC firmware
- Full PPGTT for Ivybridge, Haswell and Valleyview
- DDB distribution based on resolution
- Limited range DP display support
nouveau:
- CEC over DP AUX support
- Initial HDMI 2.0 support
virtio-gpu:
- vmap support for PRIME objects
tegra:
- Initial Tegra194 support
- DMA/IOMMU integration fixes
msm:
- a6xx perf improvements + clock prefix
- GPU preemption optimisations
- a6xx devfreq support
- cursor support
rockchip:
- PX30 support
- rgb output interface support
mediatek:
- HDMI output support on mt2701 and mt7623
rcar-du:
- Interlaced modes on Gen3
- LVDS on R8A77980
- D3 and E3 SoC support
hisilicon:
- misc fixes
mxsfb:
- runtime pm support
sun4i:
- R40 TCON support
- Allwinner A64 support
- R40 HDMI support
omapdrm:
- Driver rework changing display pipeline ordering to use common code
- DMM memory barrier and irq fixes
- Errata workarounds
exynos:
- out-bridge support for LVDS bridge driver
- Samsung 16x16 tiled format support
- Plane alpha and pixel blend mode support
tilcdc:
- suspend/resume update
mali-dp:
- misc updates"
* tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm: (1382 commits)
firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
drm/i915/icl: Fix signal_levels
drm/i915/icl: Fix DDI/TC port clk_off bits
drm/i915/icl: create function to identify combophy port
drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
drm/i915: Large page offsets for pread/pwrite
drm/i915/selftests: Disable shrinker across mmap-exhaustion
drm/i915/dp: Link train Fallback on eDP only if fallback link BW can fit panel's native mode
drm/i915: Fix intel_dp_mst_best_encoder()
drm/i915: Skip vcpi allocation for MSTB ports that are gone
drm/i915: Don't unset intel_connector->mst_port
drm/i915: Only reset seqno if actually idle
drm/i915: Use the correct crtc when sanitizing plane mapping
drm/i915: Restore vblank interrupts earlier
drm/i915: Check fb stride against plane max stride
drm/amdgpu/vcn:Fix uninitialized symbol error
drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003)
drm/amd/amdgpu: Fix debugfs error handling
drm/amdgpu: Update gc_9_0 golden settings.
drm/amd/powerplay: update PPtable with DC BTC and Tvr SocLimit fields
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c index a54d5655a191..11fea28f8ad3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | |||
| @@ -112,7 +112,7 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev) | |||
| 112 | { | 112 | { |
| 113 | int r; | 113 | int r; |
| 114 | 114 | ||
| 115 | if (adev->gart.robj == NULL) { | 115 | if (adev->gart.bo == NULL) { |
| 116 | struct amdgpu_bo_param bp; | 116 | struct amdgpu_bo_param bp; |
| 117 | 117 | ||
| 118 | memset(&bp, 0, sizeof(bp)); | 118 | memset(&bp, 0, sizeof(bp)); |
| @@ -123,7 +123,7 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev) | |||
| 123 | AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS; | 123 | AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS; |
| 124 | bp.type = ttm_bo_type_kernel; | 124 | bp.type = ttm_bo_type_kernel; |
| 125 | bp.resv = NULL; | 125 | bp.resv = NULL; |
| 126 | r = amdgpu_bo_create(adev, &bp, &adev->gart.robj); | 126 | r = amdgpu_bo_create(adev, &bp, &adev->gart.bo); |
| 127 | if (r) { | 127 | if (r) { |
| 128 | return r; | 128 | return r; |
| 129 | } | 129 | } |
| @@ -145,19 +145,18 @@ int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev) | |||
| 145 | { | 145 | { |
| 146 | int r; | 146 | int r; |
| 147 | 147 | ||
| 148 | r = amdgpu_bo_reserve(adev->gart.robj, false); | 148 | r = amdgpu_bo_reserve(adev->gart.bo, false); |
| 149 | if (unlikely(r != 0)) | 149 | if (unlikely(r != 0)) |
| 150 | return r; | 150 | return r; |
| 151 | r = amdgpu_bo_pin(adev->gart.robj, AMDGPU_GEM_DOMAIN_VRAM); | 151 | r = amdgpu_bo_pin(adev->gart.bo, AMDGPU_GEM_DOMAIN_VRAM); |
| 152 | if (r) { | 152 | if (r) { |
| 153 | amdgpu_bo_unreserve(adev->gart.robj); | 153 | amdgpu_bo_unreserve(adev->gart.bo); |
| 154 | return r; | 154 | return r; |
| 155 | } | 155 | } |
| 156 | r = amdgpu_bo_kmap(adev->gart.robj, &adev->gart.ptr); | 156 | r = amdgpu_bo_kmap(adev->gart.bo, &adev->gart.ptr); |
| 157 | if (r) | 157 | if (r) |
| 158 | amdgpu_bo_unpin(adev->gart.robj); | 158 | amdgpu_bo_unpin(adev->gart.bo); |
| 159 | amdgpu_bo_unreserve(adev->gart.robj); | 159 | amdgpu_bo_unreserve(adev->gart.bo); |
| 160 | adev->gart.table_addr = amdgpu_bo_gpu_offset(adev->gart.robj); | ||
| 161 | return r; | 160 | return r; |
| 162 | } | 161 | } |
| 163 | 162 | ||
| @@ -173,14 +172,14 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev) | |||
| 173 | { | 172 | { |
| 174 | int r; | 173 | int r; |
| 175 | 174 | ||
| 176 | if (adev->gart.robj == NULL) { | 175 | if (adev->gart.bo == NULL) { |
| 177 | return; | 176 | return; |
| 178 | } | 177 | } |
| 179 | r = amdgpu_bo_reserve(adev->gart.robj, true); | 178 | r = amdgpu_bo_reserve(adev->gart.bo, true); |
| 180 | if (likely(r == 0)) { | 179 | if (likely(r == 0)) { |
| 181 | amdgpu_bo_kunmap(adev->gart.robj); | 180 | amdgpu_bo_kunmap(adev->gart.bo); |
| 182 | amdgpu_bo_unpin(adev->gart.robj); | 181 | amdgpu_bo_unpin(adev->gart.bo); |
| 183 | amdgpu_bo_unreserve(adev->gart.robj); | 182 | amdgpu_bo_unreserve(adev->gart.bo); |
| 184 | adev->gart.ptr = NULL; | 183 | adev->gart.ptr = NULL; |
| 185 | } | 184 | } |
| 186 | } | 185 | } |
| @@ -196,10 +195,10 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev) | |||
| 196 | */ | 195 | */ |
| 197 | void amdgpu_gart_table_vram_free(struct amdgpu_device *adev) | 196 | void amdgpu_gart_table_vram_free(struct amdgpu_device *adev) |
| 198 | { | 197 | { |
| 199 | if (adev->gart.robj == NULL) { | 198 | if (adev->gart.bo == NULL) { |
| 200 | return; | 199 | return; |
| 201 | } | 200 | } |
| 202 | amdgpu_bo_unref(&adev->gart.robj); | 201 | amdgpu_bo_unref(&adev->gart.bo); |
| 203 | } | 202 | } |
| 204 | 203 | ||
| 205 | /* | 204 | /* |
