diff options
| author | Michel Dänzer <michel.daenzer@amd.com> | 2018-06-22 12:54:03 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-05 17:39:49 -0400 |
| commit | 463d2fe85b0eacb3760febe100994d4eb8fedde9 (patch) | |
| tree | 5d8feff37c8b1d8903f64402b86549b169c55c3c /drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | |
| parent | 9735bf1930e658b074d72ea46bb317ad12483692 (diff) | |
drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
To hopefully make the code dealing with GPU vs CPU pages a little
clearer.
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c index dd11b7313ca0..36113cb60ca2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | |||
| @@ -234,7 +234,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, | |||
| 234 | } | 234 | } |
| 235 | 235 | ||
| 236 | t = offset / AMDGPU_GPU_PAGE_SIZE; | 236 | t = offset / AMDGPU_GPU_PAGE_SIZE; |
| 237 | p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); | 237 | p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE; |
| 238 | for (i = 0; i < pages; i++, p++) { | 238 | for (i = 0; i < pages; i++, p++) { |
| 239 | #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS | 239 | #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS |
| 240 | adev->gart.pages[p] = NULL; | 240 | adev->gart.pages[p] = NULL; |
| @@ -243,7 +243,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, | |||
| 243 | if (!adev->gart.ptr) | 243 | if (!adev->gart.ptr) |
| 244 | continue; | 244 | continue; |
| 245 | 245 | ||
| 246 | for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) { | 246 | for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) { |
| 247 | amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr, | 247 | amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr, |
| 248 | t, page_base, flags); | 248 | t, page_base, flags); |
| 249 | page_base += AMDGPU_GPU_PAGE_SIZE; | 249 | page_base += AMDGPU_GPU_PAGE_SIZE; |
| @@ -282,7 +282,7 @@ int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset, | |||
| 282 | 282 | ||
| 283 | for (i = 0; i < pages; i++) { | 283 | for (i = 0; i < pages; i++) { |
| 284 | page_base = dma_addr[i]; | 284 | page_base = dma_addr[i]; |
| 285 | for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) { | 285 | for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) { |
| 286 | amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags); | 286 | amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags); |
| 287 | page_base += AMDGPU_GPU_PAGE_SIZE; | 287 | page_base += AMDGPU_GPU_PAGE_SIZE; |
| 288 | } | 288 | } |
| @@ -319,7 +319,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, | |||
| 319 | 319 | ||
| 320 | #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS | 320 | #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS |
| 321 | t = offset / AMDGPU_GPU_PAGE_SIZE; | 321 | t = offset / AMDGPU_GPU_PAGE_SIZE; |
| 322 | p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); | 322 | p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE; |
| 323 | for (i = 0; i < pages; i++, p++) | 323 | for (i = 0; i < pages; i++, p++) |
| 324 | adev->gart.pages[p] = pagelist ? pagelist[i] : NULL; | 324 | adev->gart.pages[p] = pagelist ? pagelist[i] : NULL; |
| 325 | #endif | 325 | #endif |
