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authorTrigger Huang <trigger.huang@amd.com>2016-11-02 05:43:44 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-11-11 10:20:58 -0500
commite22504425f72cf8a6d43884e4080e534e4919e61 (patch)
treec03b377d550f9ccc877e8968ceb891ea528375a3 /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
parent2068751d094104ab3f396c754ffc65058340f70e (diff)
drm/amdgpu:no gpu scheduler for KIQ
KIQ is used for interaction between driver and CP, and not exposed to outside client, as such it doesn't need to be handled by GPU scheduler. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c39
1 files changed, 21 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 97928d7281f6..7b60fb79c3a6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -382,24 +382,27 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
382 if (!ring->fence_drv.fences) 382 if (!ring->fence_drv.fences)
383 return -ENOMEM; 383 return -ENOMEM;
384 384
385 timeout = msecs_to_jiffies(amdgpu_lockup_timeout); 385 /* No need to setup the GPU scheduler for KIQ ring */
386 if (timeout == 0) { 386 if (ring->funcs->type != AMDGPU_RING_TYPE_KIQ) {
387 /* 387 timeout = msecs_to_jiffies(amdgpu_lockup_timeout);
388 * FIXME: 388 if (timeout == 0) {
389 * Delayed workqueue cannot use it directly, 389 /*
390 * so the scheduler will not use delayed workqueue if 390 * FIXME:
391 * MAX_SCHEDULE_TIMEOUT is set. 391 * Delayed workqueue cannot use it directly,
392 * Currently keep it simple and silly. 392 * so the scheduler will not use delayed workqueue if
393 */ 393 * MAX_SCHEDULE_TIMEOUT is set.
394 timeout = MAX_SCHEDULE_TIMEOUT; 394 * Currently keep it simple and silly.
395 } 395 */
396 r = amd_sched_init(&ring->sched, &amdgpu_sched_ops, 396 timeout = MAX_SCHEDULE_TIMEOUT;
397 num_hw_submission, 397 }
398 timeout, ring->name); 398 r = amd_sched_init(&ring->sched, &amdgpu_sched_ops,
399 if (r) { 399 num_hw_submission,
400 DRM_ERROR("Failed to create scheduler on ring %s.\n", 400 timeout, ring->name);
401 ring->name); 401 if (r) {
402 return r; 402 DRM_ERROR("Failed to create scheduler on ring %s.\n",
403 ring->name);
404 return r;
405 }
403 } 406 }
404 407
405 return 0; 408 return 0;